JAJSKR5D
October 2020 – July 2024
TMUX7211
,
TMUX7212
,
TMUX7213
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Device Comparison Table
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Thermal Information
6.4
Recommended Operating Conditions
6.5
Source or Drain Continuous Current
6.6
±15 V Dual Supply: Electrical Characteristics
6.7
±15 V Dual Supply: Switching Characteristics
6.8
±20 V Dual Supply: Electrical Characteristics
6.9
±20 V Dual Supply: Switching Characteristics
6.10
44 V Single Supply: Electrical Characteristics
6.11
44 V Single Supply: Switching Characteristics
6.12
12 V Single Supply: Electrical Characteristics
6.13
12 V Single Supply: Switching Characteristics
6.14
Typical Characteristics
7
Parameter Measurement Information
7.1
On-Resistance
7.2
Off-Leakage Current
7.3
On-Leakage Current
7.4
tON and tOFF Time
7.5
tON (VDD) Time
7.6
Propagation Delay
7.7
Charge Injection
7.8
Off Isolation
7.9
Channel-to-Channel Crosstalk
7.10
Bandwidth
7.11
THD + Noise
7.12
Power Supply Rejection Ratio (PSRR)
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Bidirectional Operation
8.3.2
Rail-to-Rail Operation
8.3.3
1.8V Logic Compatible Inputs
8.3.4
Integrated Pull-Down Resistor on Logic Pins
8.3.5
Fail-Safe Logic
8.3.6
Latch-Up Immune
8.3.7
Ultra-Low Charge Injection
8.4
Device Functional Modes
8.5
Truth Tables
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curve
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Documentation Support
10.1.1
Related Documentation
10.2
ドキュメントの更新通知を受け取る方法
10.3
サポート・リソース
10.4
Trademarks
10.5
静電気放電に関する注意事項
10.6
用語集
11
Revision History
12
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RUM|16
MPQF223A
PW|16
MPDS361A
サーマルパッド・メカニカル・データ
RUM|16
QFND679
発注情報
JAJSKR5D_pm
jajskr5d_oa
8.2
Functional Block Diagram