JAJSL81C february   2021  – july 2023 TMUX7308F , TMUX7309F

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Thermal Information
    4. 7.4  Recommended Operating Conditions
    5. 7.5  Electrical Characteristics (Global)
    6. 7.6  ±15 V Dual Supply: Electrical Characteristics
    7. 7.7  ±20 V Dual Supply: Electrical Characteristics
    8. 7.8  12 V Single Supply: Electrical Characteristics
    9. 7.9  36 V Single Supply: Electrical Characteristics
    10. 7.10 Typical Characteristics
  9. 8 Parameter Measurement Information
    1. 8.1  On-Resistance
    2. 8.2  Off-Leakage Current
    3. 8.3  On-Leakage Current
    4. 8.4  Input and Output Leakage Current Under Overvoltage Fault
    5. 8.5  Break-Before-Make Delay
    6. 8.6  Enable Delay Time
    7. 8.7  Transition Time
    8. 8.8  Fault Response Time
    9. 8.9  Fault Recovery Time
    10. 8.10 Charge Injection
    11. 8.11 Off Isolation
    12. 8.12 Crosstalk
    13. 8.13 Bandwidth
    14. 8.14 THD + Noise
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Flat On – Resistance
      2. 9.3.2 Protection Features
        1. 9.3.2.1 Input Voltage Tolerance
        2. 9.3.2.2 Powered-Off Protection
        3. 9.3.2.3 Fail-Safe Logic
        4. 9.3.2.4 Overvoltage Protection and Detection
        5. 9.3.2.5 Adjacent Channel Operation During Fault
        6. 9.3.2.6 ESD Protection
        7. 9.3.2.7 Latch-Up Immunity
        8. 9.3.2.8 EMC Protection
      3. 9.3.3 Bidirectional Operation
      4. 9.3.4 1.8 V Logic Compatible Inputs
      5. 9.3.5 Integrated Pull-Down Resistor on Logic Pins
    4. 9.4 Device Functional Modes
      1. 9.4.1 Normal Mode
      2. 9.4.2 Fault Mode
      3. 9.4.3 Truth Tables
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
    3. 10.3 Power Supply Recommendations
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.6 ±15 V Dual Supply: Electrical Characteristics

VDD = +15 V ± 10%, VSS = –15 V ±10%, GND = 0 V (unless otherwise noted) 
Typical at VDD = +15 V, VSS = –15 V, TA = 25℃  (unless otherwise noted)
PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT
ANALOG SWITCH
RON On-resistance VS = –10 V to +10 V,
IS = –1 mA		 25°C 180 250 Ω
–40°C to +85°C 330
–40°C to +125°C 390
ΔRON On-resistance mismatch between channels VS = –10 V to +10 V,
IS = –1 mA		 25°C 2.5 8 Ω
–40°C to +85°C 12
–40°C to +125°C 13
RFLAT On-resistance flatness VS = –10 V to +10 V,
IS = –1 mA		 25°C 1.5 3.5 Ω
–40°C to +85°C 4
–40°C to +125°C 4
RON_DRIFT On-resistance drift VS = 0 V, IS = –1 mA –40°C to +125°C 1 Ω/°C
IS(OFF) Source off leakage current(1) VDD = 16.5 V, VSS = –16.5 V
Switch state is off
VS = +10 V / –10 V
VD = –10 V / + 10 V		 25°C –1 0.1 1 nA
–40°C to +85°C –1 1
–40°C to +125°C –4 4
ID(OFF) Drain off leakage current(1) VDD = 16.5 V, VSS = –16.5 V
Switch state is off
VS = +10 V / –10 V
VD = –10 V / + 10 V		 25°C –1 0.1 1 nA
–40°C to +85°C –3 3
–40°C to +125°C –14 14
IS(ON)
ID(ON)		 Output on leakage current(2) VDD = 16.5 V, VSS = –16.5 V
Switch state is on
VS = VD = ±10 V		 25°C –1.5 0.3 1.5 nA
–40°C to +85°C –5 5
–40°C to +125°C –22 22
FAULT CONDITION
IS(FA) Input leakage current
during overvoltage		 VS = ± 60 V, GND = 0 V, 
VDD = 16.5 V, VSS = –16.5 V		 –40°C to +125°C ±110 µA
IS(FA) Grounded Input leakage current
during overvoltage with
grounded supply voltages		 VS = ± 60 V, GND = 0 V
VDD = VSS = 0 V		 –40°C to +125°C ±135 µA
IS(FA) Floating Input leakage current
during overvoltage with
floating supply voltages		 VS = ± 60 V, GND = 0 V,
VDD = VSS = floating		 –40°C to +125°C ±135 µA
ID(FA) Output leakage current
during overvoltage		 VS = ± 60 V, GND = 0 V,
VDD = 16.5 V, VSS = –16.5 V, –15.5V ≤ VD ≤ 16.5V		 25°C –50 ±10 50 nA
–40°C to +85°C –70 70
–40°C to +125°C –90 90
ID(FA) Grounded Output leakage current
during overvoltage with
grounded supply voltages		 VS = ± 60 V, GND = 0 V,
VDD = VSS =  0 V		 25°C –50 ±1 50 nA
–40°C to +85°C –100 100
–40°C to +125°C –500 500
ID(FA) Floating Output leakage current
during overvoltage with
floating supply voltages		 VS = ± 60 V, GND = 0 V,
VDD = VSS = floating		 25°C ±3 µA
–40°C to +85°C ±5
–40°C to +125°C ±8
LOGIC INPUT/ OUTPUT
IIH High-level input current VEN = VAx = VDD 25°C –2 ± 0.6 2 µA
–40°C to +125°C –2 2
IIL Low-level input current VEN = VAx = 0 V 25°C –1.1 ± 0.6 1.1 µA
–40°C to +125°C –1.2 1.2
SWITCHING CHARACTERISTICS
tON (EN) Enable turn-on time VS = 10 V,
RL = 4 kΩ, CL= 12 pF		 25°C 165 265 ns
–40°C to +85°C 285
–40°C to +125°C 300
tOFF (EN) Enable turn-off time VS = 10 V,
RL = 4 kΩ, CL= 12 pF		 25°C 350 400 ns
–40°C to +85°C 400
–40°C to +125°C 420
tTRAN Transition time VS = 10 V,
RL = 4 kΩ, CL= 12 pF		 25°C 170 225 ns
–40°C to +85°C 245
–40°C to +125°C 260
tRESPONSE Fault response time RL = 4 kΩ, CL= 12 pF 25°C 300 ns
tRECOVERY Fault recovery time RL = 4 kΩ, CL= 12 pF 25°C 1.2 µs
tBBM Break-before-make time delay VS = 10 V, RL = 4 kΩ, CL= 12 pF –40°C to +125°C 50 120 ns
QINJ Charge injection VS = 0 V, CL = 1 nF 25°C –15 pC
OISO Off-isolation RS = 50 Ω, RL = 50 Ω, CL = 5 pF,
VS = 200 mVRMS, VBIAS = 0 V, f = 1 MHz		 25°C –82 dB
XTALK Intra-channel crosstalk RS = 50 Ω, RL = 50 Ω, CL = 5 pF,
VS = 200 mVRMS, VBIAS = 0 V, f = 1 MHz		 25°C –95 dB
Inter-channel crosstalk (TMUX7309F) –103
BW –3 dB bandwidth (TMUX7308F) RS = 50 Ω, RL = 50 Ω, CL = 5 pF,
VS = 200 mVRMS, VBIAS = 0 V		 25°C 150 MHz
–3 dB bandwidth (TMUX7309F WQFN Package) 280
–3 dB bandwidth (TMUX7309F TSSOP Package) 240
ILOSS Insertion loss RS = 50 Ω, RL = 50 Ω, CL = 5 pF,
VS = 200 mVRMS, VBIAS = 0 V, f = 1 MHz		 25°C –9 dB
THD+N Total harmonic distortion plus noise RS = 40 Ω, RL = 10 kΩ, VS = 15 VPP, VBIAS = 0 V, f = 20 Hz to 20 kHz 25°C 0.0015 %
CS(OFF) Input off-capacitance f = 1 MHz, VS = 0 V 25°C 3.5 pF
CD(OFF) Output off-capacitance (TMUX7308F) f = 1 MHz, VS = 0 V 25°C 28 pF
Output off-capacitance (TMUX7309F) f = 1 MHz, VS = 0 V 25°C 15 pF
CS(ON)
CD(ON)		 Input/Output on-capacitance (TMUX7308F) f = 1 MHz, VS = 0 V 25°C 30 pF
Input/Output on-capacitance (TMUX7309F) f = 1 MHz, VS = 0 V 25°C 17 pF
POWER SUPPLY
IDD VDD supply current VDD = 16.5 V, VSS =  –16.5 V,
VAx = 0 V, 5 V, or VDD, VEN = 5 V or VDD		 25°C 0.25 0.5 mA
–40°C to +85°C 0.5
–40°C to +125°C 0.5
ISS VSS supply current VDD = 16.5 V, VSS = –16.5 V,
VAx = 0 V, 5 V, or VDD, VEN = 5 V or VDD		 25°C 0.15 0.4 mA
–40°C to +85°C 0.4
–40°C to +125°C 0.4
IGND GND current VDD = 16.5 V, VSS =  –16.5 V,
VAx = 0 V, 5 V, or VDD, VEN = 5 V or VDD		 25°C 0.075 mA
IDD(FA) VDD supply current under fault VS = ± 60 V,
VDD = 16.5 V, VSS = –16.5 V,
VAx = 0 V, 5 V, or VDD, VEN = 5 V or VDD		 25°C 0.25 1 mA
–40°C to +85°C 1
–40°C to +125°C 1
ISS(FA) VSS supply current under fault VS = ± 60 V,
VDD = 16.5 V, VSS = –16.5 V,
VAx = 0 V, 5 V, or VDD, VEN = 5 V or VDD		 25°C 0.15 0.5 mA
–40°C to +85°C 0.5
–40°C to +125°C 0.5
IGND(FA) GND current under fault VS = ± 60 V,
VDD = 16.5 V, VSS = –16.5 V,
VAx = 0 V, 5 V, or VDD, VEN = 5 V or VDD		 25°C 0.15 mA
IDD(DISABLE) VDD supply current (disable mode) VDD = 16.5 V, VSS = –16.5 V,
VAx = 0 V, 5 V, or VDD, VEN = 0 V		 25°C 0.15 0.5 mA
–40°C to +85°C 0.5
–40°C to +125°C 0.5
ISS(DISABLE) VSS supply current (disable mode) VDD = 16.5 V, VSS = –16.5 V,
VAx = 0 V, 5 V, or VDD, VEN = 0 V		 25°C 0.1 0.4 mA
–40°C to +85°C 0.4
–40°C to +125°C 0.4
(1) When VS is positive,VD is negative. And when VS is negative, VD is positive.
(2) When VS is at a voltage potential, VD is floating. And when VD is at a voltage potential, VS is floating.