JAJSP05B May 2023 – October 2023 TPS2000E , TPS2001E , TPS2068E , TPS2069E
PRODUCTION DATA
The logic enable input (EN, or EN), controls the power switch, bias for the charge pump, driver, and other circuits. The supply current is reduced to less than 1 µA when the TPS20xxE are disabled. Disabling the TPS20xxE immediately clears an active FLT indication. The enable input is compatible with both TTL and CMOS logic levels.
The turnon and turnoff times (tON, tOFF) are composed of a delay and a rise or fall time (tR, tF). The delay times are internally controlled. The rise time is controlled by both the TPS20xxE and the external loading (especially capacitance). TPS20xxE fall time is controlled by the loading (R and C), and the output discharge (RDCHG). An output load consisting of only a resistor experiences a fall time set by the TPS20xxE. An output load with parallel R and C elements experiences a fall time determined by the (R × C) time constant if it is longer than the tF TPS20xxE.
The enable must not be left open, and may be tied to VIN or GND depending on the device.