JAJSE35C November   2017  – August 2019 TPS25820 , TPS25821

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      概略回路図
  4. 改訂履歴
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
      1. 7.1.1 USB Type C Basic
      2. 7.1.2 Configuration Channel
      3. 7.1.3 Detecting a Connection
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Configuration Channel Pins CC1 and CC2
      2. 7.3.2 Current Capability Advertisement and VBUS Overload Protection
      3. 7.3.3 FAULT Response
      4. 7.3.4 Thermal Shutdown
      5. 7.3.5 REF
      6. 7.3.6 Plug Polarity Detection
      7. 7.3.7 Sink Attachment Indicator
      8. 7.3.8 Device Enable Control
      9. 7.3.9 Undervoltage Lockout (UVLO)
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Type-C Source Port Implementation without BC 1.2 Support
        1. 8.2.1.1 Design Requirements
          1. 8.2.1.1.1 Input and Output Capacitance Considerations
          2. 8.2.1.1.2 System Level ESD Protection
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Type -C Source Port Implementation with BC 1.2 (DCP Mode) Support
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
      3. 8.2.3 Implementing a USB 3.1 Type-C Charging Port with the TPS25820
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
        3. 8.2.3.3 Application Curves
      4. 8.2.4 Implementing TPS25821 in USB Car Chargers
        1. 8.2.4.1 Design Requirements
        2. 8.2.4.2 Detailed Design Procedure
        3. 8.2.4.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デベロッパー・ネットワークの製品に関する免責事項
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
    3. 11.3 関連リンク
    4. 11.4 ドキュメントの更新通知を受け取る方法
    5. 11.5 コミュニティ・リソース
    6. 11.6 商標
    7. 11.7 静電気放電に関する注意事項
    8. 11.8 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Switching Characteristics

–40°C ≤ TJ ≤ 125°C, 4.5 V ≤ VIN ≤ 5.5 V, VEN = VCHG = VIN, RREF = 100 kΩ. Typical values are at 25°C. All voltages are with respect to GND. IOUT and IOS defined positive out of the indicated pin (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OUT - POWER SWITCH
tr Output voltage rise time VIN = 5 V, CL = 1 µF, RL = 100 Ω (measure between 10% and 90% of final value) 0.5 0.8 1.2 ms
tf Output voltage fall time 0.2 0.3 0.4 ms
ton Output voltage turn-on time VIN = 5 V, CL = 1 µF, RL = 100 Ω 2.1 3.2 4.5 ms
toff Output voltage turn-off time 0.8 1.3 1.9 ms
tw_OUT_DCHG RDCHG application time at OUT turn off VOUT = 1 V, time ISNK_OUT > 1 mA after Sink termination removed from CC lines 169 262 361 ms
OUT - CURRENT LIMIT
tiOS Current limit response time to short circuit VIN - VOUT = 1 V, RL = 10 mΩ (see Figure 1) 1.5 4 µs
FAULT
tDEGA Asserting deglitch due to overcurrent 5.6 8.2 10.6 ms
tDEGA Asserting deglitch due to overtemperature in current limit 0 ms
tDEGD De-asserting deglitch 5.6 8.2 10.6 ms
CC1/CC2 - VCONN POWER SWITCH (TPS25820)
tr Output voltage rise time VIN2 = 5 V, CL = 1 µF, RL = 100 Ω 0.13 0.22 0.3 ms
tf Output voltage fall time 0.18 0.22 0.26 ms
ton Output voltage turn-on time VIN2 = 5 V, CL = 1 µF, RL = 100 Ω 1.4 2.2 3.2 ms
toff Output voltage turn-off time 0.25 0.33 0.4 ms
Minimum VCONN discharge time TPS25820 42 65 90 ms
CC1/CC2 - VCONN POWER SWITCH - CURRENT LIMIT (TPS25820)
tres Current limit response time to short circuit VIN – VCCx = 1 V, R = 10 mΩ (see Figure 1) 1 4 µs
SINK, POL
tDEGA Asserting deglitch 100 150 200 ms
tDEGD De-asserting deglitch 7.9 12.5 17.7 ms
TPS25820 TPS25821 OSCP_slvse24.gifFigure 1. Output Short Circuit Parameter Diagram