JAJSEQ9E November 2013 – December 2017 TPS56520 , TPS56720 , TPS56920 , TPS56C20
PRODUCTION DATA.
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The output overcurrent protection (OCP) is implemented using a cycle-by-cycle valley detect control circuit. The switch current is monitored by measuring the low-side FET switch voltage between the SW terminal and GND. This voltage is proportional to the switch current. To improve accuracy, the voltage sensing is temperature compensated.
During the on time of the high-side FET switch, the switch current increases at a linear rate determined by VIN, VOUT, the on-time and the output inductor value. During the on time of the low-side FET switch, this current decreases linearly. The average value of the switch current is the load current Iout. The TPS56X20 constantly monitors the low-side FET switch voltage, which is proportional to the switch current, during the low-side on-time. If the measured voltage is above the voltage proportional to the current limit, an internal counter is incremented per each switching cycle and the converter maintains the low-side switch on until the measured voltage is below the voltage corresponding to the current limit at which time the switching cycle is terminated and a new switching cycle begins. In subsequent switching cycles, the on-time is set to a fixed value and the current is monitored in the same manner.
There are some important considerations for this type of overcurrent protection. The peak current is the average load current plus one half of the peak-to-peak inductor current. The valley current is the average load current minus one half of the peak-to-peak inductor current. Since the valley current is used to detect the overcurrent threshold, the load current is higher than the overcurrent threshold. Also, when the current is being limited, the output voltage tends to fall as the demanded load current may be higher than the current available from the converter. When the output voltage becomes lower than 60% of the target voltage, the UVP comparator detects it. Depending on the values of Hiccup Mode bit and UVP Latchoff Mode bit in the Control A and Control B registers, the device may enter Hiccup Mode or Latchoff Mode or keep running under cycle-by-cycle current limiting.
The TPS56X20 also implements reverse overcurrent protection. When reverse overcurrent protection is triggered, the high-side MOSFET turns on for the preset on-time and then the low-side MOSFET turns on to monitor the switch valley current. The high-side MOSFET turns on again if either VFB pin voltage drops below reference voltage, or the reverse switch current hits the reverse current trip point.