JAJSEQ9E November 2013 – December 2017 TPS56520 , TPS56720 , TPS56920 , TPS56C20
PRODUCTION DATA.
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
The 7-bit address of the TPS56X20 can be any number between 34h (0110100) and 37h (0110111). The 5 MSB’s are set internally and the 2 LSB’s are customer-selectable via the A1 and A0 terminals, allowing up to 4 TPS56X20’s to be controlled on the same I2C bus. When the Master is sending the address as an 8-bit value, the 7-bit address should be sent followed by a trailing 0 to indicate this is a WRITE operation. A0 and A1 must be floated for logic 1. Do not tie them to external voltage source. The following codes assume this trailing zero.
A1 | A0 | Address (binary) | Address (hex) |
---|---|---|---|
Ground (0) | Ground (0) | 01101000 | 68h |
Ground (0) | Open (1) | 01101010 | 6Ah |
Open (1) | Ground (0) | 01101100 | 6Ch |
Open (1) | Open (1) | 01101110 | 6Eh |