JAJSEW5 March   2018 TPS62243-Q1 , TPS62244-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      標準アプリケーション回路図
      2.      効率と出力電流との関係
  4. 4 改訂履歴
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Undervoltage Lockout
      2. 8.3.2 Enable
      3. 8.3.3 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Soft Start
      2. 8.4.2 Power Save Mode
        1. 8.4.2.1 100% Duty Cycle Low Dropout Operation
      3. 8.4.3 Short-Circuit Protection
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Output Filter Design (Inductor and Output Capacitor)
          1. 9.2.2.1.1 Inductor Selection
          2. 9.2.2.1.2 Output Capacitor Selection
          3. 9.2.2.1.3 Input Capacitor Selection
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デベロッパー・ネットワークの製品に関する免責事項
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報
    1. 13.1 Package Option Addendum
      1. 13.1.1 Packaging Information
      2. 13.1.2 Tape and Reel Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.5 Electrical Characteristics

TJ = -40°C to 125°C, typical values are at TJ = 25°C, unless otherwise noted. Specifications apply for condition VIN = 3.6 V.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY
IQ Operating quiescent current IOUT = 0 mA. Pulse frequency modulation (PFM) mode enabled, device not switching 15 μA
IOUT = 0 mA. PFM mode enabled, device switching, VOUT = 1.25 V 18.5
ISD Shutdown current EN = GND, TJ = 25°C 0.1 1 μA
EN = GND 10
UVLO Undervoltage lockout threshold Falling 1.85 V
Rising 1.95
ENABLE, MODE
VIH High-level input voltage, EN 2 V ≤ VIN ≤ 6 V 1 VIN V
VIL Low-level input voltage, EN 2 V ≤ VIN ≤ 6 V, 0 0.35 V
IIN Input bias current, EN EN, MODE = GND or VIN 0.01 1 μA
POWER SWITCH
RDS(on) High-side MOSFET ON-resistance VIN = VGS = 3.6 V, TJ = 25°C 240 480 mΩ
Low-side MOSFET ON-resistance 180 380
ILIMF Forward current limit MOSFET high-side and low-side VIN = VGS = 3.6 V, 0.54 0.95 A
TSD Thermal shutdown Increasing junction temperature 140 °C
Thermal shutdown hysteresis Decreasing junction temperature 20 °C
OSCILLATOR
ƒSW Oscillator frequency 2 V ≤ VIN ≤ 6 V, PWM Mode 2 2.25 2.5 MHz
OUTPUT
VOUT Output voltage TPS62244 Q1 (fixed VOUT) 1.25 V
TPS62243 Q1 (fixed VOUT) 1.80 V
VREF Internal reference voltage 600 mV
VFB Feedback voltage PWM operation, 2 V ≤ VIN ≤ 6 V, in fixed output voltage versions VFB = VOUT, See (2) ,TJ = 25°C
–1.5% 0% 1.5%
PWM operation, 2 V ≤ VIN ≤ 6 V, in fixed output voltage versions VFB = VOUT, See (2) –1.5% 2.5%
Feedback voltage PFM mode Device in PFM mode 0%
Load regulation PWM mode –0.5 %/A
tStart up Start-up time Time from active EN to reach 95% of VOUT nominal 500 μs
tRamp VOUT ramp UP time Time to ramp from 5% to 95% of VOUT 250 μs
Ilkg Leakage current into SW pin VIN = 3.6 V, VIN = VOUT = VSW, EN = GND, TJ = 25°C(1) 0.1 1 μA
VIN = 3.6 V, VIN = VOUT = VSW, EN = GND, (1) 10
(1) The internal resistor divider network is disconnected from FB pin.
(2) For VIN = VO+ 0.6