JAJSEW5 March   2018 TPS62243-Q1 , TPS62244-Q1

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      標準アプリケーション回路図
      2.      効率と出力電流との関係
  4. 改訂履歴
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Undervoltage Lockout
      2. 8.3.2 Enable
      3. 8.3.3 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Soft Start
      2. 8.4.2 Power Save Mode
        1. 8.4.2.1 100% Duty Cycle Low Dropout Operation
      3. 8.4.3 Short-Circuit Protection
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Output Filter Design (Inductor and Output Capacitor)
          1. 9.2.2.1.1 Inductor Selection
          2. 9.2.2.1.2 Output Capacitor Selection
          3. 9.2.2.1.3 Input Capacitor Selection
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デベロッパー・ネットワークの製品に関する免責事項
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報
    1. 13.1 Package Option Addendum
      1. 13.1.1 Packaging Information
      2. 13.1.2 Tape and Reel Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Layout Guidelines

As for all switching power supplies, the layout is an important step in the design. Proper function of the device demands careful attention to PCB layout. To get the specified performance, the board layout must be carefully done. If not carefully done, the regulator could show poor line or load regulation, and additional stability issues as well as EMI problems. Figure 18 shows an example of layout design with the TLV62242-Q1 device.

  • Providing a low-inductance, low-impedance ground path is critical. Therefore, use wide and short traces for the main current paths. The input capacitor as well as the inductor and output capacitor must be placed as close as possible to the IC pins.
  • The FB line must be connected directly to the output capacitor and the FB line must be routed away from noisy components and traces (for example, the SW line).
  • Because of the small package of this converter and the overall small solution size, the thermal performance of the PCB layout is important. For good thermal performance, PCB design of at least four layers is recommended.