JAJSLH2
March 2021
TPS62810M
,
TPS62811M
,
TPS62812M
,
TPS62813M
PRODUCTION DATA
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Typical Characteristics
8
Parameter Measurement Information
8.1
Schematic
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagram
9.3
Feature Description
9.3.1
Precise Enable
9.3.2
COMP/FSET
9.3.3
MODE/SYNC
9.3.4
Spread Spectrum Clocking (SSC)
9.3.5
Undervoltage Lockout (UVLO)
9.3.6
Power Good Output (PG)
9.3.7
Thermal Shutdown
9.4
Device Functional Modes
9.4.1
Pulse Width Modulation (PWM) Operation
9.4.2
Power Save Mode Operation (PWM/PFM)
9.4.3
100% Duty-Cycle Operation
9.4.4
Current Limit and Short Circuit Protection
9.4.5
Foldback Current Limit and Short Circuit Protection
9.4.6
Output Discharge
9.4.7
Soft Start/Tracking (SS/TR)
10
Application and Implementation
10.1
Application Information
10.1.1
Programming the Output Voltage
10.1.2
Inductor Selection
10.1.3
Capacitor Selection
10.1.3.1
Input Capacitor
10.1.3.2
Output Capacitor
10.2
Typical Application
10.2.1
Design Requirements
10.2.2
Detailed Design Procedure
10.2.3
Application Curves
10.3
System Examples
10.3.1
Voltage Tracking
10.3.2
Synchronizing to an External Clock
11
Power Supply Recommendations
12
Layout
12.1
Layout Guidelines
12.2
Layout Example
13
Device and Documentation Support
13.1
Device Support
13.1.1
Third-Party Products Disclaimer
13.2
Documentation Support
13.2.1
Related Documentation
13.3
Receiving Notification of Documentation Updates
13.4
サポート・リソース
13.5
Trademarks
13.6
静電気放電に関する注意事項
13.7
用語集
14
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RWY|9
MPQF509B
サーマルパッド・メカニカル・データ
RWY|9
QFND653
発注情報
jajslh2_oa
jajslh2_pm
12
Layout