JAJSJ23F September   2019  – October 2023 TPS62860 , TPS62861

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Revision History
  6. Device Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 I2C Interface Timing Characteristics
    7. 7.7 Typical Characteristics
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Power Save Mode
      2. 8.3.2  Forced PWM Operation
      3. 8.3.3  Smart Enable and Shutdown (EN)
      4. 8.3.4  Soft Start
      5. 8.3.5  Output Voltage Selection (VSEL) for TPS62860x
      6. 8.3.6  Output Voltage Selection (VSEL and I2C)
      7. 8.3.7  Forced PWM Mode During Output Voltage Change
      8. 8.3.8  Undervoltage Lockout (UVLO)
      9. 8.3.9  Power Good (PG)
      10. 8.3.10 Switch Current Limit and Short Circuit Protection
      11. 8.3.11 Thermal Shutdown
      12. 8.3.12 Output Voltage Discharge
    4. 8.4 Programming
      1. 8.4.1 Serial Interface Description
      2. 8.4.2 Standard- and Fast-Mode Protocol
      3. 8.4.3 I2C Update Sequence
      4. 8.4.4 I2C Register Reset
    5. 8.5 Register Map
      1. 8.5.1 Slave Address Byte
      2. 8.5.2 Register Address Byte
      3. 8.5.3 VOUT Register 1
      4. 8.5.4 VOUT Register 2
      5. 8.5.5 CONTROL Register
      6. 8.5.6 STATUS Register
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application, TPS628610
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Output Capacitor Selection
        3. 9.2.2.3 Input Capacitor Selection
      3. 9.2.3 Application Curves
    3. 9.3 Typical Application, TPS628600, TPS62860x
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure
      3. 9.3.3 Application Curves
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 サード・パーティ製品に関する免責事項
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Inductor Selection

The inductor value affects the peak-to-peak ripple current, the PWM-to-PFM transition point, the output voltage ripple, and the efficiency. The selected inductor has to be rated for its DC resistance and saturation current. The inductor ripple current (ΔIL) decreases with higher inductance and increases with higher VIN or VOUT and can be estimated according to Equation 1.

Equation 2 calculates the maximum inductor current under static load conditions. The saturation current of the inductor must be rated higher than the maximum inductor current, as calculated with Equation 2. This is recommended because during a heavy load transient the inductor current rises above the calculated value. A more conservative way is to select the inductor saturation current according to the high side MOSFET switch current limit, ILIMF.

Equation 1. GUID-2F7E4C1E-B5E4-43C0-87E2-F514CEB9F715-low.gif
Equation 2. GUID-B069EB39-9C6D-4D1B-8550-9E27F7D1EEE9-low.gif

where

  • f = Switching frequency
  • L = Inductor value
  • ΔIL= Peak-to-peak inductor ripple current
  • ILmax = Maximum inductor current

Table 9-2 shows a list of possible inductors.

Table 9-2 List of Possible Inductors
INDUCTANCE [µH] INDUCTOR SERIES SIZE IMPERIAL (METRIC) DIMENSIONS L × W × T SUPPLIER(1)
0.47 DFE18SAN_G0 0603 (1608) 1.6 mm × 0.8 mm × 1.0 mm maximum Murata
0.47 HTEB16080F 0603 (1608) 1.6 mm × 0.8 mm × 0.6 mm maximum Cyntec
0.47 HTET1005FE 0402 (1005) 1.0 mm × 0.5 mm × 0.65 mm maximum Cyntec
0.47 TFM160808ALC 0603 (1608) 1.6 mm × 0.8 mm × 0.8 mm maximum TDK