JAJS427I July   2010  – October 2019 TPS63020 , TPS63021

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
      2.      効率と出力電流との関係
  4. 4 改訂履歴
  5. 5 概要 (続き)
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Dynamic Voltage Positioning
      2. 8.3.2 Dynamic Current Limit
      3. 8.3.3 Device Enable
      4. 8.3.4 Power Good
      5. 8.3.5 Overvoltage Protection
      6. 8.3.6 Undervoltage Lockout
      7. 8.3.7 Overtemperature Protection
    4. 8.4 Device Functional Modes
      1. 8.4.1 Soft-start and Short Circuit Protection
      2. 8.4.2 Buck-Boost Operation
      3. 8.4.3 Control Loop
      4. 8.4.4 Power Save Mode and Synchronization
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Custom Design with WEBENCH Tools
        2. 9.2.2.2 Inductor Selection
        3. 9.2.2.3 Output Capacitor Selection
        4. 9.2.2.4 Input Capacitor Selection
        5. 9.2.2.5 Bypass Capacitor
      3. 9.2.3 Setting The Output Voltage
      4. 9.2.4 Application Curves
    3. 9.3 System Examples
      1. 9.3.1 Improved Transient Response for 2 A Load Current
      2. 9.3.2 Supercapacitor Backup Power Supply With Active Cell Balancing
      3. 9.3.3 Low-Power TEC Driver
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントの更新通知を受け取る方法
    2. 12.2 デバイス・サポート
      1. 12.2.1 WEBENCHツールによるカスタム設計
      2. 12.2.2 デベロッパー・ネットワークの製品に関する免責事項
    3. 12.3 ドキュメントのサポート
      1. 12.3.1 関連資料
    4. 12.4 関連リンク
    5. 12.5 サポート・リソース
    6. 12.6 商標
    7. 12.7 静電気放電に関する注意事項
    8. 12.8 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

11.1 Layout Guidelines

For all switching power supplies, the layout is an important step in the design, especially at high peak currents and high switching frequencies. If the layout is not carefully done, the regulator can show stability problems as well as EMI problems. Therefore, use wide and short traces for the main current path and for the power ground tracks. Place the input capacitor, output capacitor, and the inductor as close as possible to the IC. Use a common ground node for power ground and a different one for control ground to minimize the effects of ground noise. Connect these ground nodes at any place close to one of the ground pins of the IC.

The feedback divider must be placed as close as possible to the control ground pin of the IC. To lay out the control ground, short traces are recommended as well, separation from the power ground traces. This avoids ground shift problems, which can occur due to superimposition of power ground current and control ground current.