JAJSQB6 April   2024 TPS7B92

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Wide Supply Range
      2. 6.3.2 Low Quiescent Current
      3. 6.3.3 Dropout Voltage (VDO)
      4. 6.3.4 Current Limit
      5. 6.3.5 Leakage Null Control Circuit
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Setting VOUT for the TPS7B9201 Adjustable LDO
        2. 7.2.2.2 External Capacitor Requirements
        3. 7.2.2.3 Input and Output Capacitor Requirements
        4. 7.2.2.4 Reverse Current
        5. 7.2.2.5 Feed-Forward Capacitor (CFF)
        6. 7.2.2.6 Power Dissipation (PD)
        7. 7.2.2.7 Estimating Junction Temperature
      3. 7.2.3 Application Curves
    3. 7.3 Best Design Practices
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
        1. 7.5.1.1 Power Dissipation
      2. 7.5.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Evaluation Module
        2. 8.1.1.2 Spice Models
      2. 8.1.2 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 ドキュメントの更新通知を受け取る方法
    4. 8.4 サポート・リソース
    5. 8.5 Trademarks
    6. 8.6 静電気放電に関する注意事項
    7. 8.7 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

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メカニカル・データ（パッケージ｜ピン）
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発注情報

7.2.2.1 Setting VOUT for the TPS7B9201 Adjustable LDO

As illustrated in Figure 7-2, the TPS7B92 contains an adjustable version (the TPS7B9201) that sets the output voltage using an external resistor divider. The output voltage operating range is 1.205V to VIN − VDO, and is calculated using:

Equation 2. V O U T   =   V R E F   ×   1   +   R 1 R 2

where:

  • VREF = 1.205V (typical)

Choose resistors R1 and R2 to allow approximately 1.5μA of current through the resistor divider. To ignore the FB pin current error term in the VOUT equation, set the feedback divider current to 15 times the FB pin current listed in the Electrical Characteristics table. Using lower value resistors improves noise performance, but consumes more power. Avoid higher resistor values. Leakage current into or out of FB across R1 / R2 creates an offset voltage proportional to VOUT divided by VREF. Choose R2 = 1MΩ to set the divider current at 1.205μA. Equation 3 calculates R1. Figure 7-2 depicts this configuration.

Equation 3. R 1   =   V O U T V R E F   -   1   ×   R 2

To understand more about the impact of feedback divider current on the output accuracy, see the IQ vs Accuracy Tradeoff in Designing Resistor Divider application note.