JAJSMS4F August   2021  – March 2024 TPS7H2211-SEP , TPS7H2211-SP

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Options
  6. 5 Related Products
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics: All Devices
    6. 7.6  Electrical Characteristics: CFP and KGD Options
    7. 7.7  Electrical Characteristics: HTSSOP Option
    8. 7.8  Switching Characteristics: All Devices
    9. 7.9  Quality Conformance Inspection
    10. 7.10 Typical Characteristics
  9. 8 Parameter Measurement Information
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Enable and Overvoltage Protection
      2. 9.3.2 Current Limit
      3. 9.3.3 Soft Start (Adjustable Rise Time)
      4. 9.3.4 Parallel Operation
      5. 9.3.5 Reverse Current Protection
      6. 9.3.6 Forward Leakage Current
    4. 9.4 Device Functional Modes
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Application 1: Cold Sparing
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
          1. 10.2.1.2.1 Capacitance
          2. 10.2.1.2.2 Enable Control
          3. 10.2.1.2.3 Overvoltage Protection
          4. 10.2.1.2.4 Soft Start Time
          5. 10.2.1.2.5 Summary
        3. 10.2.1.3 Application Curve
      2. 10.2.2 Application 2: Protection
        1. 10.2.2.1 Design Requirements
        2. 10.2.2.2 Detailed Design Procedure
          1. 10.2.2.2.1 Capacitance
          2. 10.2.2.2.2 Enable Control
          3. 10.2.2.2.3 Overvoltage Protection
          4. 10.2.2.2.4 Soft Start Time
          5. 10.2.2.2.5 Summary
        3. 10.2.2.3 Application Curve
    3. 10.3 Power Supply Recommendations
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DAP|32
  • KGD|0
  • HKR|16
サーマルパッド・メカニカル・データ
発注情報

9.3.6 Forward Leakage Current

When VIN is powered but the TPS7H2211 is disabled (EN is low), the internal FETs are disabled, creating a high impedance path from VIN to VOUT. However, there are parasitic leakage paths that could cause VOUT to slowly charge. The forward leakage current, IF, indicates how much current flows from VIN to VOUT during this situation. This is typically 0.65 mA at VIN = 12 V but could be a maximum of 1.3 mA at 14 V.

Some applications may tolerate these leakage mechanisms while some applications may need to pay particular attention to this behavior. It is particularly relevant when VOUT is a high impedance node (and therefore the leakage current goes entirely to charging VOUT instead of being dissipated). By using the basic capacitor equation shown in Equation 8, the time for the voltage to rise to a given value can be theoretically calculated.

Equation 8. Δt = ΔVOUT × COUT / IF

where

  • Δt = time to charge to final value
  • ΔVOUT = change in output voltage; for a 0 V starting voltage, use VIN

For example, with a 12-V input voltage and a 220-µF output capacitance, VOUT will typically charge to 12 V in 4.1 seconds (using IF = 0.65 mA, ΔVOUT = 12 V, COUT = 220 µF).

If the output voltage must remain below a certain value, a pull-down resistor can be utilized with a value as calculated by Equation 9.

Equation 9. VOUTLKG_MAX = IF × RPULL_DOWN

where

  • VOUTLKG_MAX = maximum output voltage due to leakage current, IF
  • RPULL_DOWN = external pull-down resistor from VOUT to GND

For example, placing a 1-kΩ resistor between VOUT and ground will ensure VOUT does not rise above 0.65-V typically or 1.3-V worse case due to the IF current. It is recommended to ensure the resistor can handle the worst case power dissipation when the switch is enabled and VOUT ≈ VIN.