JAJSMS4F August   2021  – March 2024 TPS7H2211-SEP , TPS7H2211-SP

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Options
  6. 5 Related Products
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics: All Devices
    6. 7.6  Electrical Characteristics: CFP and KGD Options
    7. 7.7  Electrical Characteristics: HTSSOP Option
    8. 7.8  Switching Characteristics: All Devices
    9. 7.9  Quality Conformance Inspection
    10. 7.10 Typical Characteristics
  9. 8 Parameter Measurement Information
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Enable and Overvoltage Protection
      2. 9.3.2 Current Limit
      3. 9.3.3 Soft Start (Adjustable Rise Time)
      4. 9.3.4 Parallel Operation
      5. 9.3.5 Reverse Current Protection
      6. 9.3.6 Forward Leakage Current
    4. 9.4 Device Functional Modes
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Application 1: Cold Sparing
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
          1. 10.2.1.2.1 Capacitance
          2. 10.2.1.2.2 Enable Control
          3. 10.2.1.2.3 Overvoltage Protection
          4. 10.2.1.2.4 Soft Start Time
          5. 10.2.1.2.5 Summary
        3. 10.2.1.3 Application Curve
      2. 10.2.2 Application 2: Protection
        1. 10.2.2.1 Design Requirements
        2. 10.2.2.2 Detailed Design Procedure
          1. 10.2.2.2.1 Capacitance
          2. 10.2.2.2.2 Enable Control
          3. 10.2.2.2.3 Overvoltage Protection
          4. 10.2.2.2.4 Soft Start Time
          5. 10.2.2.2.5 Summary
        3. 10.2.2.3 Application Curve
    3. 10.3 Power Supply Recommendations
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DAP|32
  • KGD|0
  • HKR|16
サーマルパッド・メカニカル・データ
発注情報

8 Parameter Measurement Information

GUID-20200903-CA0I-F7BM-XTCD-W5BJV7686ZFV-low.png
A. VIN is held constant during the test.
B. VRCP_ENTER is referenced from VOUT to VIN. It is the threshold that, when reached, will turn-off the main switch FETs to prevent reverse current flow.
Figure 8-1 Reverse Current Protection Enter (VRCP_ENTER) Test Waveforms
GUID-20200903-CA0I-VKTG-8KXK-LJPRM31PC9PR-low.png
A. VIN is held constant during the test.
B. VRCP_EXIT is referenced from VOUT to VIN. It is the threshold that, when reached, will turn-off the reverse current protection feature.
Figure 8-2 Reverse Current Protection Exit (VRCP_EXIT) Test Waveforms
GUID-F7566C5D-C1F5-4822-B2F6-1E6B1A1ABAA2-low.gif Figure 8-3 EN Signal Low Time to Restart Device (tLOW_OFF)
GUID-4B2ED58A-456D-4B8C-B496-5671BDF3F68F-low.gif Figure 8-4 Turn-On Time (tON), Turn-Off Time (tOFF), and VOUT Fall Time (tF) Waveforms
GUID-BBF2046B-E663-4303-8348-C5C52F268F74-low.png
A. The OVP test signal uses a typical rise time and fall time of 30 ns.
Figure 8-5 OVP Assert (tASSERT) and OVP Deassert (tDEASSERT) Waveforms