The PCB layout of any DC/DC module is critical to the optimal performance of the design. Poor PCB layout can disrupt the operation of an otherwise good schematic design. Even if the module regulates correctly, bad PCB layout can mean the difference between a robust design and one that cannot be mass produced. Furthermore, to a great extent, the EMI performance of the regulator is dependent on the PCB layout. In a buck converter module, the most critical PCB feature is the loop formed by the input capacitor or capacitors and power ground, as shown in Figure 8-22. This loop carries large transient currents that can cause large transient voltages when reacting with the trace inductance. These unwanted transient voltages disrupt the proper operation of the power module. Because of this, the traces in this loop must be wide and short, and the loop area as small as possible to reduce the parasitic inductance. Layout Exmple shows a recommended layout for the critical components of the TPSM336x5.

1. Place the input capacitors as close as possible to the VIN and GND terminals. VIN and GND pins are adjacent, simplifying the input capacitor placement.
2. Place bypass capacitor for VCC close to the VCC pin. This capacitor must be placed close to the device and routed with short, wide traces to the VCC and GND pins.
3. Place the feedback divider as close as possible to the FB pin of the device. Place R_FBB, R_FBT, and C_FF, if used, physically close to the device. The connections to FB and GND must be short and close to those pins on the device. The connection to V_OUT can be somewhat longer. However, the latter trace must not be routed near any noise source (such as the SW node) that can capacitively couple into the feedback path of the regulator.
4. Use at least one ground plane in one of the middle layers. This plane acts as a noise shield and as a heat dissipation path.
5. Provide wide paths for VIN, VOUT, and GND. Making these paths as wide and direct as possible reduces any voltage drops on the input or output paths of the power module and maximizes efficiency.
6. Provide enough PCB area for proper heat-sinking. Sufficient amount of copper area must be used to ensure a low R_θJA, commensurate with the maximum load current and ambient temperature. The top and bottom PCB layers must be made with two ounce copper and no less than one ounce. If the PCB design uses multiple copper layers (recommended), these thermal vias can also be connected to the inner layer heat-spreading ground planes.
7. Use multiple vias to connect the power planes to internal layers.

See the following PCB layout resources for additional important guidelines:

• Layout Guidelines for Switching Power Supplies Application Report
• Simple Switcher PCB Layout Guidelines Application Report
• Construction Your Power Supply- Layout Considerations Seminar
• Low Radiated EMI Layout Made Simple with LM4360x and LM4600x Application Report

Figure 8-22 Current Loops with Fast Edges