JAJSPC8C December   2022  – February 2024 TPSM33615 , TPSM33625

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 絶対最大定格
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 電気的特性
    6. 6.6 System Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Input Voltage Range
      2. 7.3.2  Output Voltage Selection
      3. 7.3.3  Input Capacitors
      4. 7.3.4  Output Capacitors
      5. 7.3.5  Enable, Start-Up, and Shutdown
      6. 7.3.6  External CLK SYNC (with MODE/SYNC)
        1. 7.3.6.1 Pulse-Dependent MODE/SYNC Pin Control
      7. 7.3.7  Switching Frequency (RT)
      8. 7.3.8  Power-Good Output Operation
      9. 7.3.9  Internal LDO, VCC and VOUT/FB Input
      10. 7.3.10 Bootstrap Voltage and VBOOT-UVLO (BOOT Terminal)
      11. 7.3.11 Spread Spectrum
      12. 7.3.12 Soft Start and Recovery from Dropout
        1. 7.3.12.1 Recovery from Dropout
      13. 7.3.13 Overcurrent Protection (Hiccup Mode)
      14. 7.3.14 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Standby Mode
      3. 7.4.3 Active Mode
        1. 7.4.3.1 CCM Mode
        2. 7.4.3.2 Auto Mode – Light-Load Operation
          1. 7.4.3.2.1 Diode Emulation
          2. 7.4.3.2.2 Frequency Reduction
        3. 7.4.3.3 FPWM Mode – Light-Load Operation
        4. 7.4.3.4 Minimum On-Time (High Input Voltage) Operation
        5. 7.4.3.5 Dropout
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Custom Design With WEBENCH® Tools
        2. 8.2.2.2  Choosing the Switching Frequency
        3. 8.2.2.3  Setting the Output Voltage
        4. 8.2.2.4  Input Capacitor Selection
        5. 8.2.2.5  Output Capacitor Selection
        6. 8.2.2.6  VCC
        7. 8.2.2.7  CFF Selection
        8. 8.2.2.8  Power Good Signal
        9. 8.2.2.9  Maximum Ambient Temperature
        10. 8.2.2.10 Other Connections
      3. 8.2.3 Application Curves
    3. 8.3 Best Design Practices
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
        1. 8.5.1.1 Ground and Thermal Considerations
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 サード・パーティ製品に関する免責事項
      2. 9.1.2 Development Support
        1. 9.1.2.1 Custom Design With WEBENCH® Tools
      3. 9.1.3 Device Nomenclature
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 ドキュメントの更新通知を受け取る方法
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 静電気放電に関する注意事項
    7. 9.7 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.3.3 Input Capacitors

Input capacitors are required to limit the input ripple voltage to the module due to switching-frequency AC currents. TI recommends using ceramic capacitors to provide low impedance and high RMS current rating over a wide temperature range. Equation 4 gives the input capacitor RMS current. The highest input capacitor RMS current occurs at D = 0.5, at which point, the RMS current rating of the capacitors must be greater than half the output current.

Equation 4. ICIN,rms=D×IOUT2×1-D+∆IL212

where

  • D = VOUT / VIN is the module duty cycle.

Ideally, the DC and AC components of the input current to the buck stage are provided by the input voltage source and the input capacitors, respectively. Neglecting inductor ripple current, the input capacitors source current of amplitude (IOUT – IIN) during the D interval and sink IIN during the 1 – D interval. Thus, the input capacitors conduct a square-wave current of peak-to-peak amplitude equal to the output current. The resulting capacitive component of the AC ripple voltage is a triangular waveform. Together with the ESR-related ripple component, Equation 5 gives the peak-to-peak ripple voltage amplitude.

Equation 5. ∆ V I N = I O U T × D × 1 - D F S W × C I N + I O U T × R E S R

Equation 6 gives the input capacitance required for a particular load current.

Equation 6. CIN≥D×1-D×IOUTFSW×∆VIN-RESR×IOUT

where

  • ΔVIN is the input voltage ripple specification.

The TPSM336x5 requires a minimum of a 4.7-µF ceramic type input capacitance. Only use high-quality ceramic type capacitors with sufficient voltage and temperature rating. The ceramic input capacitors provide a low impedance source to the power module in addition to supplying the ripple current and isolating switching noise from other circuits. Additional capacitance can be required for applications with transient load requirements. The voltage rating of the input capacitors must be greater than the maximum input voltage. To compensate for the derating of ceramic capacitors, TI recommends a voltage rating of twice the maximum input voltage or placing multiple capacitors in parallel. Table 7-2 includes a preferred list of capacitors by vendor.

Table 7-2 Recommended Input Capacitors
VENDOR (1) DIELECTRIC PART NUMBER CASE SIZE CAPACITOR CHARACTERISTICS
VOLTAGE RATING (V) CAPACITANCE (µF) (2)
TDK X7R C3225X7R1H475K2 50AB 1210 50 4.7
Wurth X7R 885012209048 1210 50 4.7
Murata X5R GRM155R61H104M E14D 0402 50 0.1
Chemi-Con Electrolytic EMVY500ADA101M HA0G HA0 50 100
(1) Consult capacitor suppliers regarding availability, material composition, RoHS and lead-free status, and manufacturing process requirements for any capacitors identified in this table. See the Third-Party Products Disclaimer.
(2) Nameplate capacitance values (the effective values are lower based on the applied DC voltage and temperature).