JAJSTA1 August   2024 TPSM8287A12M , TPSM8287A15M

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Options
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed-Frequency DCS-Control Topology
      2. 7.3.2  Forced-PWM and Power Save Modes
      3. 7.3.3  Precise Enable
      4. 7.3.4  Start-Up
      5. 7.3.5  Switching Frequency Selection
      6. 7.3.6  Output Voltage Setting
        1. 7.3.6.1 Output Voltage Setpoint
        2. 7.3.6.2 Output Voltage Range
        3. 7.3.6.3 Non-Default Output Voltage Setpoint
        4. 7.3.6.4 Dynamic Voltage Scaling (DVS)
      7. 7.3.7  Compensation (COMP)
      8. 7.3.8  Mode Selection / Clock Synchronization (MODE/SYNC)
      9. 7.3.9  Spread Spectrum Clocking (SSC)
      10. 7.3.10 Output Discharge
      11. 7.3.11 Undervoltage Lockout (UVLO)
      12. 7.3.12 Overvoltage Lockout (OVLO)
      13. 7.3.13 Overcurrent Protection
        1. 7.3.13.1 Cycle-by-Cycle Current Limiting
        2. 7.3.13.2 Hiccup Mode
        3. 7.3.13.3 Current-Limit Mode
      14. 7.3.14 Power Good (PG)
        1. 7.3.14.1 Power-Good Standalone, Primary Device Behavior
        2. 7.3.14.2 Power-Good Secondary Device Behavior
      15. 7.3.15 Remote Sense
      16. 7.3.16 Thermal Warning and Shutdown
      17. 7.3.17 Stacked Operation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power-On Reset (POR)
      2. 7.4.2 Undervoltage Lockout
      3. 7.4.3 Standby
      4. 7.4.4 On
    5. 7.5 Programming
      1. 7.5.1 Serial Interface Description
      2. 7.5.2 Standard-, Fast-, Fast-Mode Plus Protocol
      3. 7.5.3 I2C Update Sequence
      4. 7.5.4 I2C Register Reset
  9. 8 Device Registers
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Selecting the Input Capacitors
        2. 9.2.2.2 Selecting the Target Loop Bandwidth
        3. 9.2.2.3 Selecting the Compensation Resistor
        4. 9.2.2.4 Selecting the Output Capacitors
        5. 9.2.2.5 Selecting the Compensation Capacitor, CComp1
        6. 9.2.2.6 Selecting the Compensation Capacitor, CComp2
      3. 9.2.3 Application Curves
    3. 9.3 Typical Application Using Four TPSM8287A1xM in Parallel Operation
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure
        1. 9.3.2.1 Selecting the Input Capacitors
        2. 9.3.2.2 Selecting the Target Loop Bandwidth
        3. 9.3.2.3 Selecting the Compensation Resistor
        4. 9.3.2.4 Selecting the Output Capacitors
        5. 9.3.2.5 Selecting the Compensation Capacitor, CComp1
        6. 9.3.2.6 Selecting the Compensation Capacitor, CComp2
      3. 9.3.3 Application Curves
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 サード・パーティ製品に関する免責事項
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 ドキュメントの更新通知を受け取る方法
    4. 10.4 サポート・リソース
    5. 10.5 Trademarks
    6. 10.6 静電気放電に関する注意事項
    7. 10.7 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Tape and Reel Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.3.2 Forced-PWM and Power Save Modes

The device can control the inductor current in three different ways to regulate the output:

  • Pulse-width modulation with continuous inductor current (PWM-CCM)
  • Pulse-width modulation with discontinuous inductor current (PWM-DCM)
  • Pulse-frequency modulation with discontinuous inductor current and pulse skipping (PFM-DCM)
The on-time in PWM-CCM is set by Equation 1. For very small output voltages, a minimum on time of approximately 50ns (tON_min) reduces the switching frequency from the set value. Even when the minimum on-time is reached, the device maintains proper output voltage regulation by extending the off-time.

Equation 1. t O N = V O U T V I N ×   f S W

During PWM-CCM operation, the device switches at a constant frequency and the inductor current is continuous (see Figure 7-2). PWM operation achieves the lowest output voltage ripple and the best transient performance.


TPSM8287A12M TPSM8287A15M Continuous Conduction Mode (PWM-CCM) Current Waveform

Figure 7-2 Continuous Conduction Mode (PWM-CCM) Current Waveform

During PWM-DCM operation the device switches at a constant frequency and the inductor current is discontinuous (see Figure 7-3). In this mode the device controls the peak inductor current to maintain the selected switching frequency while still being able to regulate the output.

Equation 2 is used to calculate the output current threshold at which the device changes from PWM-CCM to PWM-DCM:

Equation 2. I O U T ( CCM-DCM ) = V I N × t O N 2 ×   1 - V O U T V I N L

TPSM8287A12M TPSM8287A15M Discontinuous Conduction Mode (PWM-DCM) Current Waveform

Figure 7-3 Discontinuous Conduction Mode (PWM-DCM) Current Waveform

During PFM-DCM operation the device keeps the peak inductor current constant (at a level corresponding to an approximately 20ns on-time of the converter) and skips pulses to regulate the output (see Figure 7-4). The switching pulses that occur during PFM-DCM operation are synchronized to the internal clock.

TPSM8287A12M TPSM8287A15M Discontinuous Conduction Mode (PFM-DCM) Current Waveform Figure 7-4 Discontinuous Conduction Mode (PFM-DCM) Current Waveform

Equation 3 is used to calculate the output current threshold at which the device changes from PWM-DCM to PFM-DCM:

Equation 3. I O U T ( P F M - e n t r y ) = V I N × 20 ns 2 ×   1 - V O U T V I N L

Figure 7-5 through Figure 7-8 show how the PWM-DCM to PFM-DCM threshold typically varies with VIN and VOUT.

TPSM8287A12M TPSM8287A15M PFM-DCM Entry Threshold TPSM8287A12BAM
MODE/SYNC = Low
Figure 7-5 PFM-DCM Entry Threshold TPSM8287A12BAM
TPSM8287A12M TPSM8287A15M PFM-DCM Entry Threshold TPSM8287A15BAM
MODE/SYNC = Low
Figure 7-7 PFM-DCM Entry Threshold TPSM8287A15BAM
TPSM8287A12M TPSM8287A15M PFM-DCM Entry Threshold TPSM8287A12BBM
MODE/SYNC = Low
Figure 7-6 PFM-DCM Entry Threshold TPSM8287A12BBM
TPSM8287A12M TPSM8287A15M PFM-DCM Entry Threshold TPSM8287A15BBM
MODE/SYNC = Low
Figure 7-8 PFM-DCM Entry Threshold TPSM8287A15BBM

Configure the device to use either Forced-PWM Mode (FPWM) or Power Save Mode (PSM):

  • In Forced-PWM mode, the device uses PWM-CCM at all times
  • In power save mode, the device uses PWM-CCM at medium and high loads, PWM-DCM at light loads, and PFM-DCM at very light loads. Transitions between the different operating modes are seamless.

Table 7-1 shows the function table of the MODE/SYNC pin and the FPWMEN bit in the CONTROL1 register, which controls the operating mode of the device.

Table 7-1 FPWM Mode and Power Save Mode Selection
SSCEN Bit FPWMEN Bit MODE/SYNC Pin OPERATING MODE REMARK
0 0 Low PSM Do not use in a stacked configuration
1 0 Low PSM
0 1 X FPWM
0 X High FPWM
X X Sync Clock FPWM See Section 7.3.8
1 1 X FPWM See Section 7.3.9
1 X High FPWM