JAJSTV6 May   2024 TPSM86637 , TPSM86638

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  The Adaptive On-Time Control and PWM Operation
      2. 6.3.2  Mode Selection
        1. 6.3.2.1 FCCM Control and Eco-mode Control
      3. 6.3.3  Soft Start and Prebiased Soft Start
      4. 6.3.4  Enable and Adjusting Undervoltage Lockout
      5. 6.3.5  Output Overcurrent Limit and Undervoltage Protection
      6. 6.3.6  Overvoltage Protection
      7. 6.3.7  UVLO Protection
      8. 6.3.8  Thermal Shutdown
      9. 6.3.9  Output Voltage Discharge
      10. 6.3.10 Power Good
      11. 6.3.11 Large Duty Operation
    4. 6.4 Device Functional Modes
      1. 6.4.1 Standby Operation
      2. 6.4.2 Light Load Operation
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Output Voltage Resistors Selection
        2. 7.2.2.2 Output Filter Selection
        3. 7.2.2.3 Input Capacitor Selection
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
      1. 7.3.1 Application Thermal Considerations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 サード・パーティ製品に関する免責事項
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 ドキュメントの更新通知を受け取る方法
    4. 8.4 サポート・リソース
    5. 8.5 Trademarks
    6. 8.6 静電気放電に関する注意事項
    7. 8.7 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.2.2.2 Output Filter Selection

The LC filter used as the output filter has double pole at:

Equation 7. fp=12π×LOUT×COUT

At low frequencies, the overall loop gain is set by the output set-point resistor divider network and the internal gain of the device. The low frequency phase is 180 degrees. At the output filter pole frequency, the gain rolls off at a –40dB per decade rate and the phase drops rapidly. D-CAP3 control mode introduces a high frequency zero that reduces the gain roll off to –20dB per decade and increases the phase to 90 degrees one decade above the zero frequency. The inductor and capacitor for the output filter must be selected so that the double pole of Equation 7 is located below the high frequency zero but close enough that the phase boost provided by the high frequency zero provides adequate phase margin for a stable circuit. To meet this requirement, use the values recommended in Table 7-2.

Table 7-2 Recommended Component Values

Switching Frequency (kHz)

Output Voltage
(V)(1)		R7
(kΩ)(2)		R8
(kΩ)		COUT (µF)(3)C8 (pF)(4)

Typical

Maximum

800

1.05

7.5

10

22uF × 3

22uF × 10
1.82010

22uF × 3

22uF × 10

30-100 (47 typical)

3.345.310

22uF × 3

22uF × 10

30-100 (47 typical)

573.210

22uF × 2

22uF × 10

30-100 (47 typical)

12

190

10

22uF × 422uF × 10

30-100 (47 typical)

1200

1.05

7.5

10

22uF × 322uF × 10

1.8

20

10

22uF × 322uF × 10

30-100 (47 typical)

3.3

45.3

10

22uF × 322uF × 10

30-100 (47 typical)

5

73.2

10

22uF × 222uF × 10

100-200 (150 typical)

12

190

10

22uF × 422uF × 10

30-100 (47 typical)

(1) Please use the recommended COUT of the higher and closest output rail for unlisted output rails.
(2) R7 = 0Ω for VOUT = 0.6V.
(3) COUT in this data sheet is using Murata GRM32ER71E226KE15L 25VDC capacitor. TI recommends to use the same effective output capacitance. The effective capacitance is defined as the actual capacitance under DC bias and temperature, not the rated or nameplate values. All high value ceramic capacitors have a large voltage coefficient in addition to normal tolerances and temperature effects. A careful study of bias and temperature variation of any capacitor bank must be made to make sure that the minimum value of effective capacitance is provided. Refer to the information of DC bias and temperature characteristics from manufacturers of ceramic capacitors. Higher than Cout_max capacitance is allowed by careful tuning the feedforward compensation.
(4) R10 and C8 can be used to improve the load transient response or improve the loop-phase margin. The Optimizing Transient Response of Internally Compensated DCDC Converters with Feed-forward Capacitor application report is helpful when experimenting with a feed-forward capacitor.

The capacitor value and ESR determines the amount of output voltage ripple. The TPSM86638 is intended for use with ceramic or other low ESR capacitors. Use Equation 8 to determine the required RMS current rating for the output capacitor.

Equation 8. ICORMS=VOUT×VIN-VOUT12×VIN×LOUT×Fsw

For this design, three MuRata GRM32ER71E226KE15L 25VDC 22µF output capacitors are used so that the effective capacitance is 68µF at DC biased voltage of 1.8V.