JAJSP14F August   1995  – August 2022 UC1823A , UC1825A , UC2823A , UC2823B , UC2825A , UC2825B , UC3823A , UC3823B , UC3825A , UC3825B

PRODUCTION DATA  

  1. 1特長
  2. 2概要
  3. 3Revision History
  4. 4Ordering Information
  5. 5Pin Configuration and Functions
    1.     Terminal Functions
  6. 6Specifications
    1. 6.1 ABSOLUTE MAXIMUM RATINGS
    2. 6.2 Thermal Information
    3. 6.3 ELECTRICAL CHARACTERISTICS
    4. 6.4 ELECTRICAL CHARACTERISTICS
  7. 7Application and Implementation
    1. 7.1 LEADING EDGE BLANKING
    2. 7.2 UVLO、ソフト・スタート、フォルト管理
    3. 7.3 ACTIVE LOW OUTPUTS DURING UVLO
    4. 7.4 CONTROL METHODS
    5. 7.5 SYNCHRONIZATION
    6. 7.6 HIGH CURRENT OUTPUTS
    7. 7.7 GROUND PLANES
    8. 7.8 OPEN LOOP TEST CIRCUIT
  8. 8Device and Documentation Support
    1. 8.1 Documentation Support
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  9. 9Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • J|16
  • FK|20
サーマルパッド・メカニカル・データ
発注情報

8.5 Electrostatic Discharge Caution

GUID-D6F43A01-4379-4BA1-8019-E75693455CED-low.gif This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.