SLUSB86C November   2012  – June 2017 UCC28710 , UCC28711 , UCC28712 , UCC28713

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Detailed Pin Description
        1. 8.3.1.1 VDD (Device Bias Voltage Supply)
        2. 8.3.1.2 GND (Ground)
        3. 8.3.1.3 VS (Voltage-Sense)
        4. 8.3.1.4 DRV (Gate Drive)
        5. 8.3.1.5 CS (Current Sense)
        6. 8.3.1.6 CBC (Cable Compensation), Pin 1 UCC28700
        7. 8.3.1.7 NTC (NTC Thermistor Shut-down), Pin 1 UCC28701/2/3
      2. 8.3.2 Fault Protection
    4. 8.4 Device Functional Modes
      1. 8.4.1 Primary-Side Voltage Regulation
      2. 8.4.2 Primary-Side Current Regulation
      3. 8.4.3 Valley Switching
      4. 8.4.4 Start-Up Operation
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Custom Design With WEBENCH® Tools
        2. 9.2.2.2 Stand-by Power Estimate
        3. 9.2.2.3 Input Bulk Capacitance and Minimum Bulk Voltage
        4. 9.2.2.4 Transformer Turns Ratio, Inductance, Primary-Peak Current
        5. 9.2.2.5 Transformer Parameter Verification
        6. 9.2.2.6 Output Capacitance
        7. 9.2.2.7 VDD Capacitance, CDD
        8. 9.2.2.8 VS Resistor Divider, Line Compensation, and Cable Compensation
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
        1. 12.1.1.1 Custom Design With WEBENCH® Tools
      2. 12.1.2 Device Nomenclature
        1. 12.1.2.1  Capacitance Terms in Farads
        2. 12.1.2.2  Duty Cycle Terms
        3. 12.1.2.3  Frequency Terms in Hertz
        4. 12.1.2.4  Current Terms in Amperes
        5. 12.1.2.5  Current and Voltage Scaling Terms
        6. 12.1.2.6  Transformer Terms
        7. 12.1.2.7  Power Terms in Watts
        8. 12.1.2.8  Resistance Terms in Ω
        9. 12.1.2.9  Timing Terms in Seconds
        10. 12.1.2.10 Voltage Terms in Volts
        11. 12.1.2.11 AC Voltage Terms in VRMS
        12. 12.1.2.12 Efficiency Terms
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
      2. 12.2.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • D|7
サーマルパッド・メカニカル・データ
発注情報

7 Specifications

7.1 Absolute Maximum Ratings

See (1).
MIN MAX UNIT
VHV Start-up pin voltage, HV 700 V
VVDD Bias supply voltage, VDD 38 V
IDRV Continuous gate current sink 50 mA
IDRV Continuous gate current source Self-limiting mA
IVS Peak current, VS −1.2 mA
VDRV Gate drive voltage at DRV −0.5 Self-limiting V
Voltage VS −0.75 7 V
CS, CBC, NTC −0.5 5 V
TJ Operating junction temperature −55 150 °C
Lead temperature 0.6 mm from case for 10 s 260 °C
Tstg Storage temperature −65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages are with respect to GND. Currents are positive into, negative out of the specified terminal. These ratings apply over the operating ambient temperature ranges unless otherwise noted.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. .

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VDD Bias supply operating voltage 9 35 V
CVDD VDD bypass capacitor 0.047 1 µF
RCBC Cable-compensation resistance 10 kΩ
IVS VS pin current −1 mA
TJ Operating junction temperature −40 125 °C

7.4 Thermal Information

THERMAL METRIC(1) UCC2871x UNIT
D (SOIC)
7 PINS
RθJA Junction-to-ambient thermal resistance 141.5 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 73.8 °C/W
RθJB Junction-to-board thermal resistance 89 °C/W
ψJT Junction-to-top characterization parameter 23.5 °C/W
ψJB Junction-to-board characterization parameter 88.2 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

7.5 Electrical Characteristics

over operating free-air temperature range, VVDD = 25 V, HV = open, RCBC(NTC) = open, TA = –40 °C to 125 °C, TA = TJ
(unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
HIGH-VOLTAGE START UP
IHV Start-up current out of VDD VHV = 100 V, VVDD = 0 V, start state 100 250 500 µA
IHVLKG Leakage current at HV VHV = 400 V, run state 0.1 1 µA
BIAS SUPPLY INPUT
IRUN Supply current, run IDRV = 0, run state 2 2.65 mA
IWAIT Supply current, wait IDRV = 0, wait state 95 120 µA
ISTART Supply current, start IDRV = 0, VVDD = 18 V, start state, IHV = 0 18 30 µA
IFAULT Supply current, fault IDRV = 0, fault state 95 125 µA
UNDERVOLTAGE LOCKOUT
VVDD(on) VDD turnon threshold VVDD low to high 19 21 23 V
VVDD(off) VDD turnoff threshold VVDD high to low 7.7 8.1 8.5 V
VS INPUT
VVSR Regulating level Measured at no-load condition, TJ = 25 °C(1) 4.01 4.05 4.09 V
VVSNC Negative clamp level IVS = –300 µA, volts below ground 190 250 325 mV
IVSB Input bias current VVS = 4 V –0.25 0 0.25 µA
CS INPUT
VCST(max) Maximum CS threshold voltage VVS = 3.7 V 738 780 810 mV
VCST(min) Minimum CS threshold voltage VVS = 4.35 V 175 195 215 mV
KAM AM control ratio VCST(max) / VCST(min) 3.6 4 4.4 V/V
VCCR Constant current regulating level CC regulation constant 318 330 343 mV
KLC Line compensation current ratio IVSLS = –300 µA, IVSLS / current out of CS pin 24 25 28.6 A/A
TCSLEB Leading-edge blanking time DRV output duration, VCS = 1 V 180 235 280 ns
DRIVERS
IDRS DRV source current VDRV = 8 V, VVDD = 9 V 20 25 mA
RDRVLS DRV low-side drive resistance IDRV = 10 mA 6 12 Ω
VDRCL DRV clamp voltage VVDD = 35 V 14 16 V
RDRVSS DRV pulldown in start state 150 190 230 kΩ
TIMING
fSW(max) Maximum switching frequency VVS = 3.7 V 92 100 106 kHz
fSW(min) Minimum switching frequency VVS = 4.35 V UCC28710
UCC28711
UCC28712
UCC28713		 600 680 755 Hz
tZTO Zero-crossing timeout delay 1.8 2.1 2.55 µs
PROTECTION
VOVP Overvoltage threshold At VS input, TJ = 25 °C(1) 4.55 4.6 4.71 V
VOCP Overcurrent threshold At CS input 1.4 1.5 1.6 V
IVSL(run) VS line-sense run current Current out of VS pin increasing 190 225 275 µA
IVSL(stop) VS line-sense stop current Current out of VS pin decreasing 70 80 100 µA
KVSL VS line sense ratio IVSL(run) / IVSL(stop) 2.45 2.8 3.05 A/A
TJ(stop) Thermal shut-down temperature Internal junction temperature 165 °C
CABLE COMPENSATION
VCBC(max) Cable compensation maximum voltage Voltage at CBC at full load UCC28710 2.9 3.2 3.5 V
VCVS(min) Compensation at VS VCBC = open, change in VS regulating level at full load UCC28710 –55 –15 25 mV
VCVS(max) Maximum compensation at VS VCBC = 0 V, change in VS regulating level at full load UCC28710 275 320 375 mV
VCVS Compensation at VS Change in VS regulating level at full load UCC28711 –55 –15 25 mV
UCC28712 103
UCC28713 206
NTC INPUT
VNTCTH NTC shut-down threshold Fault UVLO cycle when below this threshold UCC28711
UCC28712
UCC28713		 0.9 0.95 1 V
INTC NTC pullup current Current out of pin UCC28711
UCC28712
UCC28713		 90 105 125 µA
(1) The regulating level at VS decreases with temperature by 0.8 mV/˚C. This compensation is included to reduce the power supply output voltage variance over temperature.

7.6 Typical Characteristics

VDD = 25 V, unless otherwise noted.
UCC28710 UCC28711 UCC28712 UCC28713 wav1_lus86.png Figure 1. Bias Supply Current vs. Bias Supply Voltage
UCC28710 UCC28711 UCC28712 UCC28713 wav3_lus86.png Figure 3. VS Regulation Voltage vs. Temperature
UCC28710 UCC28711 UCC28712 UCC28713 wav5_lus86.png Figure 5. Minimum CS Threshold vs. Temperature
UCC28710 UCC28711 UCC28712 UCC28713 wav7_lus86.png
Figure 7. Minimum Switching Frequency vs. Temperature
UCC28710 UCC28711 UCC28712 UCC28713 wav9_lus86.png Figure 9. NTC Shutdown Threshold Voltage vs. Temperature
UCC28710 UCC28711 UCC28712 UCC28713 wav11_lus86.png Figure 11. VS Overvoltage Threshold vs. Temperature
UCC28710 UCC28711 UCC28712 UCC28713 wav2_lus86.png Figure 2. Bias Supply Current vs. Temperature
UCC28710 UCC28711 UCC28712 UCC28713 wav4_lus86.png Figure 4. VS Line Sense Current vs. Temperature
UCC28710 UCC28711 UCC28712 UCC28713 wav6_lus86.png Figure 6. Constant Current Regulating Level vs. Temperature
UCC28710 UCC28711 UCC28712 UCC28713 wav8_lus86.png
VDRV = 8 V VVDD = 9 V
Figure 8. DRV Source Current vs. Temperature
UCC28710 UCC28711 UCC28712 UCC28713 wav10_lus86.png Figure 10. NTC Pull-Up Current vs. Temperature
UCC28710 UCC28711 UCC28712 UCC28713 wav12_lus86.png Figure 12. HV Start-Up Current vs. Temperature