JAJSK73J March   2012  – November 2021 UCD3138

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 機能ブロック図
  5. 5 Revision History
  6. 6 Device Comparison Table
    1. 6.1 Product Family Comparison
    2. 6.2 Product Selection Matrix
  7. 7 Pin Configuration and Functions
    1. 7.1 UCD3138RGC 64 QFN Pin Attributes
    2. 7.2 UCD3138RHA, UCD3138RMH and UCD3138RJA Pin Attributes
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing and Switching Characteristics
    7. 8.7 Power Supply Sequencing
    8. 8.8 Peripherals
      1. 8.8.1 Digital Power Peripherals (DPPs)
        1. 8.8.1.1 Front End
        2. 8.8.1.2 DPWM Module
        3. 8.8.1.3 DPWM Events
        4. 8.8.1.4 High Resolution DPWM
        5. 8.8.1.5 Oversampling
        6. 8.8.1.6 DPWM Interrupt Generation
        7. 8.8.1.7 DPWM Interrupt Scaling/Range
    9. 8.9 Typical Temperature Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 ARM Processor
    3. 9.3 Memory
      1. 9.3.1 CPU Memory Map and Interrupts
      2. 9.3.2 Boot ROM
      3. 9.3.3 Customer Boot Program
      4. 9.3.4 Flash Management
    4. 9.4 System Module
      1. 9.4.1 Address Decoder (DEC)
      2. 9.4.2 Memory Management Controller (MMC)
      3. 9.4.3 System Management (SYS)
      4. 9.4.4 Central Interrupt Module (CIM)
    5. 9.5 Feature Description
      1. 9.5.1  Sync FET Ramp and IDE Calculation
      2. 9.5.2  Automatic Mode Switching
        1. 9.5.2.1 Phase Shifted Full Bridge Example
        2. 9.5.2.2 LLC Example
        3. 9.5.2.3 Mechanism for Automatic Mode Switching
      3. 9.5.3  DPWMC, Edge Generation, IntraMux
      4. 9.5.4  Filter
        1. 9.5.4.1 Loop Multiplexer
        2. 9.5.4.2 Fault Multiplexer
      5. 9.5.5  Communication Ports
        1. 9.5.5.1 SCI (UART) Serial Communication Interface
        2. 9.5.5.2 PMBUS
        3. 9.5.5.3 General Purpose ADC12
        4. 9.5.5.4 Timers
          1. 9.5.5.4.1 24-bit PWM Timer
          2. 9.5.5.4.2 16-Bit PWM Timers
          3. 9.5.5.4.3 Watchdog Timer
      6. 9.5.6  Miscellaneous Analog
      7. 9.5.7  Package ID Information
      8. 9.5.8  Brownout
      9. 9.5.9  Global I/O
      10. 9.5.10 Temperature Sensor Control
      11. 9.5.11 I/O Mux Control
      12. 9.5.12 Current Sharing Control
      13. 9.5.13 Temperature Reference
    6. 9.6 Device Functional Modes
      1. 9.6.1 Normal Mode
      2. 9.6.2 Phase Shifting
      3. 9.6.3 DPWM Multiple Output Mode
      4. 9.6.4 DPWM Resonant Mode
      5. 9.6.5 Triangular Mode
      6. 9.6.6 Leading Edge Mode
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 PCMC (Peak Current Mode Control) PSFB (Phase Shifted Full Bridge) Hardware Configuration Overview
        2. 10.2.2.2 DPWM Initialization for PSFB
        3. 10.2.2.3 DPWM Synchronization
        4. 10.2.2.4 Fixed Signals to Bridge
        5. 10.2.2.5 Dynamic Signals to Bridge
        6. 10.2.2.6 System Initialization for PCM
          1. 10.2.2.6.1 Use of Front Ends and Filters in PSFB
          2. 10.2.2.6.2 Peak Current Detection
          3. 10.2.2.6.3 Peak Current Mode (PCM)
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
    1. 11.1 Introduction To Power Supply and Layout Recommendations
    2. 11.2 3.3-V Supply Pins
    3. 11.3 Recommendation for V33 Ramp up Slew Rate for UCD3138 and UCD3138064
    4. 11.4 Recommendation for RC Time Constant of RESET Pin for UCD3138 and UCD3138064
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 EMI and EMC Mitigation Guidelines
      2. 12.1.2 BP18 Pin
      3. 12.1.3 Additional Bias Guidelines
      4. 12.1.4 UCD3138 Pin Connection Recommendation
        1. 12.1.4.1 Current Amplifier With EADC Connection
        2. 12.1.4.2 DPWM Synchronization
        3. 12.1.4.3 GPIOS
        4. 12.1.4.4 DPWM PINS
        5. 12.1.4.5 EAP and EAN Pins
        6. 12.1.4.6 ADC Pins
      5. 12.1.5 UART Communication Port
      6. 12.1.6 Special Considerations
    2. 12.2 Layout Example
      1. 12.2.1 UCD3138 and UCD3138064 40 Pin
      2. 12.2.2 UCD3138 and UCD3138064 64 Pin
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Code Composer Studio
      2. 13.1.2 Tools and Documentation
    2. 13.2 Documentation Support
      1. 13.2.1 References
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 サポート・リソース
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical Packaging and Orderable Information
    1. 14.1 Packaging Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Revision History

Changes from Revision I (January 2017) to Revision J (November 2021)

  • 同期機能の説明を変更し、 UCD3138064 だけではなく UCD3138 ファミリのすべてのメンバーと連携して動作する旨を記述TI データシートの標準に合わせて「デバイスの概要」セクションを 4 つのセクションに分割Go
  • 14 の外部チャネルと 1 つの内部温度センサがあるため、 ADC チャネル数を 15 に変更Go
  • update Product Family Comparison to show full UCD family Go
  • Added mention of debugging capability to the JTAG pin descriptions and added note that the RMH package is not recommended for new designsGo
  • Added DAC Output as an alternative pin out for pins 2, 3, and 4.Go
  • Correct location of PMBus/SMBus/I2C rise and fall time test conditions Table 8-1 Go
  • Added "using the EADCs as a source" to the digital comparator description Go
  • Replaced the Power Suppply and Layout Guidelines Section with the Power Supply Recommendations Section and Layout Section. The new content is copied directly from the UCD3138 Family Practical Design Guideline Application Note. Go
  • Updated FUSION_DIGITAL_POWER_STUDIO URLs. Moved all CCS references to the Code Composer Studio section and updated them. Also updated the list of documents.Go
  • Changed References section Go

Changes from Revision H (October 2016) to Revision I (January 2017)

  • Added updated Layout Guidelines section and added Layout Example imagesGo

Changes from Revision G (September 2016) to Revision H (October 2016)

  • 「製品情報」表に パッケージ図面欄を追加Go
  • 注 2 を「高度な BLR 性能を備え、新しい 40 ピン設計に推奨」から「基板レベルの信頼性 (BLR) のための温度サイクルテスト性能向上に最適化されており、新しい 40 ピン設計に推奨」に変更。Go
  • Deleted Figure 7-3 note, "These features help to improve solder-joint reliability". Go

Changes from Revision F (November 2013) to Revision G (September 2016)

  • 「デバイスおよびドキュメントのサポート」セクション、「ESD 定格」表を追加。Go
  • UCD3138A と一致するようにドキュメントのフローを変更。Go
  • 「特長」および「製品情報」表に RJA パッケージを追加Go
  • Added RJA package. Go
  • Added the RJA package to the Thermal Information table.Go

Changes from Revision E (August 2013) to Revision F (November 2013)

  • 「注文情報」表で、上面のマーキング情報を「3138」から「3138RMH」に変更Go

Changes from Revision D (August 2013) to Revision E (August 2013)

  • 「特長」の箇条書きに UCD3138RMH を追加Go
  • Added RMH package pinout drawingGo
  • Added RMH package thermal specificationsGo
  • Changed Global I/O registers ordered list, item 5 text from "Connecting pin/pins to high rail through internal pull up resistors." to "Configuring pin/pins as open drain or push-pull (Normal)"Go

Changes from Revision C (March 2013) to Revision D (August 2013)

  • Changed TOPT spec to TJ in Abs Max table with MAX temp of 150°CGo
  • Added BP18 Voltage vs Temperature graphicGo

Changes from Revision B (July 2012) to Revision C (March 2013)

  • 特長の「JTAG デバッグ・ポート」の箇条書き項目を削除Go
  • 「概要」セクションから文字列「JTAG デバッグ」を削除。Go
  • 「機能ブロック図」の下に注を追加Go
  • Deleted "JTAG" option from Product Selection Matrix.Go
  • Added text to Pin 54 descriptionGo
  • Added text to Pin 35 descriptionGo
  • Added BP18 spec to Abs Max Ratings and Recommended Operating Conditions TablesGo
  • Deleted VDD specification from System Performance section of Electrical Characteristics Go
  • Added footnote to Table 8-1 Go
  • Added text string regarding front-end 2 in the Front End section Go
  • Deleted text string reference to "JTAG port" in ARM Processor sectionGo
  • Changed text strings in Section 13.1.2 Go
  • Added document to References listGo

Changes from Revision A (March 2012) to Revision B (July 2012)

  • 「特長」の箇条書き項目を追加Go
  • 「特長」セクションの「デュアル・エッジ変調」を「三角波変調」に変更Go
  • 「特長」セクションの「265ksps」を「267ksps」に変更Go
  • 「特長」セクションの UART の数を明確化Go
  • 全体を通して「DPP」を「DDP」に変更。Go
  • 全体を通して「DPP」を「DDP」に変更。Go
  • Changed Total GPIO pin count for the UCD3138 40-pin device from "17" to "18" in the Product Selection Matrix table.Go
  • Changed "VREG" to "BP18" in conditions statement for Electrical Characteristics Go
  • Changed EAP – EAN Error voltage digital resolution MIN values for AFE = 3, AFE = 2, AFE = 1, AFE = 0 from 0.95, 1.90, 3.72, and 7.3 respectively; to, 0.8, 1.7, 3.55, and 6.90 respectively.Go
  • Changed conditions for VOL and VOH specifications in Electrical Characteristics Go
  • Added TWD specification to Electrical Characteristics Go
  • Changed "PWM" to "DPWM" in Section 8.8.1.2 Go
  • Changed waveforms graphic for "Phase Shifted Full Bridge Example" for clarification Go
  • Added text to section Section 9.5.2.2 Go
  • Changed typical conversion speed from "268 ksps" to "267 ksps" in the General Purpose ADC12 section.Go
  • Added package ID information for the UCD3138RGC and UCD3138RHA devices.Go
  • Added bullet "AD02 has a special ESD protection mechanism that prevents the pin from pulling down the current-share bus if power is missing from the UCD3138" to Section 9.5.12 .Go
  • Changed "PWMA" and "PWMB" to "DPWMA" and "DPWMB" in Section 9.6.1. Go
  • Changed " Mechanical Data" section to "References" sectionGo

Changes from Revision * (March 2012) to Revision A (March 2012)

  • 「製品プレビュー」のバナーを削除、脚注に量産データの記述を追加Go