JAJSFC2C May   2011  – April 2018 TPS61260 , TPS61261

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
  4. 改訂履歴
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Parameter Measurement Information
    1. 7.1 Schematic and List of Components
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Controller Circuit
      2. 8.3.2 Synchronous Boost Operation
      3. 8.3.3 Power Save Mode
      4. 8.3.4 Device Enable
      5. 8.3.5 Softstart and Short Circuit Protection
    4. 8.4 Device Functional Modes
      1. 8.4.1 Undervoltage Lockout
      2. 8.4.2 Output Overvoltage Protection
    5. 8.5 Programming
      1. 8.5.1 Programming the Output Voltage
      2. 8.5.2 Programming the Output Current
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 TPS61260 3.3-V Output Application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Inductor Selection
          2. 9.2.1.2.2 Capacitor Selection
            1. 9.2.1.2.2.1 Input Capacitor
            2. 9.2.1.2.2.2 Output Capacitor
        3. 9.2.1.3 TPS61260 3.3-V Output Application Performance Plots
      2. 9.2.2 TPS61261 Application as LED Driver
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 TPS61261 Application as LED Driver Performance Plots
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デバイス・サポート
      1. 12.1.1 デベロッパー・ネットワークの製品に関する免責事項
    2. 12.2 ドキュメントのサポート
      1. 12.2.1 関連資料
    3. 12.3 関連リンク
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

Layout Guidelines

  • For all switching power supplies, layout is an important step in the design, especially at high peak currents and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems as well as EMI problems. Therefore, use wide and short traces for the main current path and for the power ground tracks. The input capacitor, output capacitor, and the inductor should be placed as close as possible to the IC. Use a common ground node for power ground and a different one for control ground to minimize the effects of ground noise. Connect these ground nodes at any place close to the ground pin of the IC.

The feedback divider should be placed as close as possible to the control ground connection. To lay out the control ground, short traces are recommended as well, separated from the power ground traces. This avoids ground shift problems, which can occur due to superimposition of power ground current and control ground current. See Figure 25 for the recommended layout.