JAJSFO6G December   2015  – July 2024 TPS99000-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics—Transimpedance Amplifier Parameters
    6. 5.6  Electrical Characteristics—Digital to Analog Converters
    7. 5.7  Electrical Characteristics—Analog to Digital Converter
    8. 5.8  Electrical Characteristics—FET Gate Drivers
    9. 5.9  Electrical Characteristics—Photo Comparator
    10. 5.10 Electrical Characteristics—Voltage Regulators
    11. 5.11 Electrical Characteristics—Temperature and Voltage Monitors
    12. 5.12 Electrical Characteristics—Current Consumption
    13. 5.13 Power-Up Timing Requirements
    14. 5.14 Power-Down Timing Requirements
    15. 5.15 Timing Requirements—Sequencer Clock
    16. 5.16 Timing Requirements—Host and Diagnostic Port SPI Interface
    17. 5.17 Timing Requirements—ADC Interface
    18. 5.18 Switching Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Illumination Control
        1. 6.3.1.1 Illumination System High Dynamic Range Dimming Overview
        2. 6.3.1.2 Illumination Control Loop
        3. 6.3.1.3 Continuous Mode Operation
          1. 6.3.1.3.1 Output Capacitance in Continuous Mode
          2. 6.3.1.3.2 Continuous Mode Driver Distortion and Blanking Current
          3. 6.3.1.3.3 Continuous Mode S_EN2 Dissipative Load Shunt Options
          4. 6.3.1.3.4 Continuous Mode Constant OFF Time
          5. 6.3.1.3.5 Continuous Mode Current Limit
        4. 6.3.1.4 Discontinuous Mode Operation
          1. 6.3.1.4.1 Discontinuous Mode Pulse Width Limit
          2. 6.3.1.4.2 COMPOUT_LOW Timer in Discontinuous Operation
          3. 6.3.1.4.3 Dimming Within Discontinuous Operation Range
          4. 6.3.1.4.4 Multiple Pulse Heights to Increase Bit Depth
          5. 6.3.1.4.5 TIA Gain Adjustment
          6. 6.3.1.4.6 Current Limit in Discontinuous Mode
          7. 6.3.1.4.7 CMODE Big Cap Mode in Discontinuous Operation
      2. 6.3.2 Over-Brightness Detection
        1. 6.3.2.1 Photo Feedback Monitor BIST
        2. 6.3.2.2 Excessive Brightness BIST
      3. 6.3.3 Analog to Digital Converter
        1. 6.3.3.1 Analog to Digital Converter Input Table
      4. 6.3.4 Power Sequencing and Monitoring
        1. 6.3.4.1 Power Monitoring
      5. 6.3.5 DMD Mirror Voltage Regulator
      6. 6.3.6 Low Dropout Regulators
      7. 6.3.7 System Monitoring Features
        1. 6.3.7.1 Windowed Watchdog Circuits
        2. 6.3.7.2 Die Temperature Monitors
        3. 6.3.7.3 External Clock Ratio Monitor
      8. 6.3.8 Communication Ports
        1. 6.3.8.1 Serial Peripheral Interface (SPI)
    4. 6.4 Device Functional Modes
      1. 6.4.1 OFF
      2. 6.4.2 STANDBY
      3. 6.4.3 POWERING_DMD
      4. 6.4.4 DISPLAY_RDY
      5. 6.4.5 DISPLAY_ON
      6. 6.4.6 PARKING
      7. 6.4.7 SHUTDOWN
    5. 6.5 Register Maps
      1. 6.5.1 System Status Registers
      2. 6.5.2 ADC Control
      3. 6.5.3 General Fault Status
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 HUD
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Application Design Considerations
          1. 7.2.1.2.1 Photodiode Considerations
          2. 7.2.1.2.2 LED Current Measurement
          3. 7.2.1.2.3 Setting the Current Limit
          4. 7.2.1.2.4 Input Voltage Variation Impact
          5. 7.2.1.2.5 Discontinuous Mode Photo Feedback Considerations
          6. 7.2.1.2.6 Transimpedance Amplifiers (TIAs, Usage, Offset, Dark Current, Ranges, RGB Trim)
      2. 7.2.2 Headlight
        1. 7.2.2.1 Design Requirements
  9. 8 Power Supply Recommendations
    1. 8.1 TPS99000-Q1 Power Supply Architecture
    2. 8.2 TPS99000-Q1 Power Outputs
    3. 8.3 Power Supply Architecture
  10. 9 Layout
    1. 9.1 Layout Guidelines
      1. 9.1.1 Power/High Current Signals
      2. 9.1.2 Sensitive Analog Signals
      3. 9.1.3 High-Speed Digital Signals
      4. 9.1.4 High Power Current Loops
      5. 9.1.5 Kelvin Sensing Connections
      6. 9.1.6 Ground Separation
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 サード・パーティ製品に関する免責事項
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

7.2 Typical Applications

There are two configurations for this chip, HUD and headlight. Table 7-1 shows the differences in the pin connections between the two configurations.

Table 7-1 Pin Configuration Differences for HUD and Headlight
PINNAMEDESCRIPTIONHUDHEADLIGHT
12COMPOUTPhotodiode (PD) Interface High-speed comparator outputConnect to DLPC23x-Q1 GPIO_02No connect
15SYNCExternal LED buck driver sync strobe outputSee Section 7.2.1.2.3No connect
18D_ENLED Interface; Buck High-Side FET Drive EnableConnect to DLPC23x-Q1 D_EN (GPIO_04)Connect to DLPC23x-Q1 D_EN (GPIO_04) or ground
19S_ENLED Bypass Shunt Strobe InputConnect to DLPC23x-Q1 S_EN (GPIO_03)Connect to DLPC23x-Q1 S_EN (GPIO_03) or ground
20LED_SEL_0LED Enable Strobe 0 InputConnect to DLPC23x-Q1 PMIC_LEDSEL_0Connect to DLPC23x-Q1 PMIC_LEDSEL_0 or ground
21LED_SEL_1LED Enable Strobe 1 InputConnect to DLPC23x-Q1 PMIC_LEDSEL_1Connect to DLPC23x-Q1 PMIC_LEDSEL_1 or ground
22LED_SEL_2LED Enable Strobe 2 InputConnect to DLPC23x-Q1 PMIC_LEDSEL_2Ground
23LED_SEL_3LED Enable Strobe 3 InputConnect to DLPC23x-Q1 PMIC_LEDSEL_3Ground
38DRV_ENDrive enable for LM3409Driver select enableResistor to ground
39CMODECapacitor selection output (allows for a smaller capacitance to be used in CM mode for less over/under shoot). Open drainSee Section 6.3.1.4.7No connect
40DMUX0Digital test point outputEither connect to test point or leave unconnected. Do not ground.Either connect to test point or leave unconnected. Do not ground.
41DMUX1Digital test point outputEither connect to test point or leave unconnected. Do not ground.Either connect to test point or leave unconnected. Do not ground.
43S_EN1Low resistance shunt NFET drive enable [High means shunt active]See Section 6.3.1.3.3Shunt enable / No connect
44S_EN2High resistance shunt NFET drive enable [High means shunt active]See Section 6.3.1.3.3No connect
45R_ENRed channel select. Drive for low side NFETFET enableFET enable / No connect
46G_ENGreen channel select. Drive for low side NFETFET enableFET enable / No connect
47B_ENBlue channel select. Drive for low side NFETFET enableFET enable / No connect
57AMUX1Analog Test Mux Output 1Either connect to test point or leave unconnected. Do not ground.Either connect to test point or leave unconnected. Do not ground.
61AMUX0Analog Test Mux Output 0Either connect to test point or leave unconnected. Do not ground.Either connect to test point or leave unconnected. Do not ground.
62VIN_LDOT_M8Dedicated TIA Interface –8V(nom) LDO external regulation FET drive signal for -8V regulatorRefer to Section 6.3.6Connect as described inSection 6.3.6 or do not connect (select NC option in SW).
63VLDOT_M8Dedicated TIA Interface –8V (nom) LDO filtered supply (regulated voltage feedback)Refer to Section 6.3.6Connect as described inSection 6.3.6 or do not connect (select NC option in SW).
76R_IADJExternal resistance for IADJ voltage to current transformationSee Section 7.2.1.2.3Ground
77IADJCurrent output used to adjust external LED controller drive current set pointSee Section 7.2.1.2.3Ground
85ADC_IN1External ADC Channel 1, see Table 6-2Connect to LED anode with voltage dividerNo connect / Optional (customer use)
86ADC_IN2External ADC Channel 2, see Table 6-2Optional (LED input voltage)No connect / Optional (customer use)
88ADC_IN3External ADC Channel 3, see Table 6-2No connect / Optional (customer use)No connect / Optional (customer use)
90ADC_IN4External ADC Channel 4, see Table 6-2No connect / Optional (customer use)No connect / Optional (customer use)
92ADC_IN5External ADC Channel 5, see Table 6-2No Connect / Optional (Thermistor)No connect / Optional (customer use)
93ADC_IN6External ADC Channel 6, see Table 6-2No Connect / Optional (Thermistor)No connect / Optional (customer use)
94ADC_IN7External ADC Channel 7, see Table 6-2No Connect / Optional (Thermistor)No connect / Optional (customer use)

Pulldown resistors are required on the pins in the below table to avoid a floating input during the power-up and power-down conditions.

Table 7-2 Pulldown Resistor Requirements
PINNAMETYP
5ADC_MOSI10 kΩ
6WD110 kΩ
16SEQ_START10 kΩ
17SEQ_CLK10 kΩ
18D_EN(1)10 kΩ
19S_EN(1)10 kΩ
20LED_SEL_0(1)10 kΩ
21LED_SEL_1(1)10 kΩ
22LED_SEL_2(1)10 kΩ
23LED_SEL_3(1)10 kΩ
27SPI1_CLK10 kΩ
30SPI1_DIN10 kΩ
31SPI2_DIN10 kΩ
34SPI2_CLK10 kΩ
49DMD_VOFFSET(2)56 kΩ
50DMD_VBIAS(2)110 kΩ
51DMD_VRESET(2)68 kΩ
(1) If these pins are not connected to the DLPC23x-Q1 (as in a Headlight configuration) then they may be tied directly to ground without a pulldown resistor.
(2) Resistor pulldowns are required to create a minimum load for DMD_VOFFSET, DMD_VBIAS, and DMD_VRESET. Each of these pulldowns should provide a load from 0.1mA to 1mA. If the -8V LDO is used, then the pull down for DMD_VRESET may be eliminated. If only one or zero TIAs are used, then these pull downs may draw up to 1mA of current.