JAJSG28F august   2018  – august 2020 TPS2120 , TPS2121

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
    1.     8
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  9. 8 Parameter Measurement Information
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Input Settling Time and Output Soft Start Control (SS)
        1. 9.3.1.1 Slew Rate vs. CSS Capacitor
      2. 9.3.2 Active Current Limiting (ILM)
      3. 9.3.3 Short-Circuit Protection
      4. 9.3.4 Thermal Protection (TSD)
      5. 9.3.5 Overvoltage Protection (OVx)
      6. 9.3.6 Fast Reverse Current Blocking (RCB)
      7. 9.3.7 Output Voltage Dip and Fast Switchover Control (TPS2121 only)
      8. 9.3.8 Input Voltage Comparator (VCOMP)
    4. 9.4 TPS2120 Device Functional Modes
    5. 9.5 TPS2121 Device Functional Modes
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Manual Switchover Schematic
      2. 10.2.2 Design Requirements
      3. 10.2.3 Detailed Design Description
      4. 10.2.4 Design Procedure
        1. 10.2.4.1 Selecting PR1 and CP2 Resistors
        2. 10.2.4.2 Selecting OVx Resistors
        3. 10.2.4.3 Selecting Soft-Start Capacitor and Current Limit Resistors
      5. 10.2.5 Application Curves
    3. 10.3 Automatic Switchover with Priority (XCOMP)
      1. 10.3.1 Application Schematic
      2. 10.3.2 Design Requirements
      3. 10.3.3 Detailed Design Description
      4. 10.3.4 Design Procedure
        1. 10.3.4.1 Selecting PR1 and CP2 Resistors
      5. 10.3.5 Application Curves
    4. 10.4 Automatic Seamless Switchover with Priority (XREF)
      1. 10.4.1 Application Schematic
      2. 10.4.2 Design Requirements
      3. 10.4.3 Detailed Design Description
      4. 10.4.4 Application Curves
    5. 10.5 Highest Voltage Operation (VCOMP)
      1. 10.5.1 Application Schematic
      2. 10.5.2 Design Requirements
      3. 10.5.3 Detailed Design Description
      4. 10.5.4 Detailed Design Procedure
      5. 10.5.5 Application Curves
    6. 10.6 Reverse Polarity Protection with TPS212x
    7. 10.7 Hotplugging with TPS212x
  12. 11Power Supply Recommendations
  13. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  14. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Links
    2. 13.2 ドキュメントの更新通知を受け取る方法
    3. 13.3 サポート・リソース
    4. 13.4 Trademarks
    5. 13.5 静電気放電に関する注意事項
    6. 13.6 用語集
  15. 14Mechanical, Packaging, and Orderable Information

10.3.3 Detailed Design Description

The first example demonstrates automatic switchover from main power (IN1) to standby power (IN2). This architecture is commonly found on applications that require a secondary/auxiliary input to conserve power while keeping downstream loads on. When switching between main and auxiliary power, the voltage drop on the output should also be minimal to prevent the downstream load from resetting or entering a lockout condition.

In this first example, the system is prioritizing the 12-V main supply on IN1. When the 12-V supply drops below 7.6 V, the device will automatically switch to the 5-V auxiliary supply on IN2. When the 12-V supply returns, it will become the output supply again. Furthermore, the voltage drop on the output should be minimal, providing the output with uninterrupted redundant power.

To minimize the voltage dip on the output, the TPS2121 will be used in fast switchover mode. By configuring the device in external comparator control scheme (XCOMP), the voltages on PR1 and CP2 are compared to determine whether IN1 or IN2 is powering the output. However, unlike the XREF mode, described above in the manual switchover configuration, XCOMP does not connect an external GPIO signal to the CP2 pin. Instead, PR1 and CP2 are connected to IN1 and IN2 respectively, allowing a direct voltage comparison between the two input channels. PR1 and CP2 are connected to IN1 and IN2 with a resistor divider. If the voltage on CP2 is higher than the voltage on PR1, then IN2 will power the output. If the voltage on PR1 is higher than the voltage on CP2, then IN1 will power the output.