JAJSKV6D August 2020 – April 2024 DRV8714-Q1 , DRV8718-Q1
PRODMIX
DRV8714-Q1 Register Map lists the memory-mapped registers for the DRV8714-Q1. All register addresses not listed should be considered as reserved locations and the register contents should not be modified. Descriptions of reserved locations are provided for reference only.
Name | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | Type | Addr. |
---|---|---|---|---|---|---|---|---|---|---|
IC_STAT1 | SPI_OK | POR | FAULT | WARN | DS_GS | UV | OV | OT_WD_AGD | R | 00h |
VDS_STAT1 | VDS_H1 | VDS_L1 | VDS_H2 | VDS_L2 | VDS_H3 | VDS_L3 | VDS_H4 | VDS_L4 | R | 01h |
VDS_STAT2 | RSVD | R | 02h | |||||||
VGS_STAT1 | VGS_H1 | VGS_L1 | VGS_H2 | VGS_L2 | VGS_H3 | VGS_L3 | VGS_H4 | VGS_L4 | R | 03h |
VGS_STAT2 | RSVD | R | 04h | |||||||
IC_STAT2 | PVDD_UV | PVDD_OV | VCP_UV | OTW | OTSD | WD_FLT | SCLK_FLT | RSVD | R | 05h |
IC_STAT3 | RSVD | IC_ID | R | 06h | ||||||
IC_CTRL1 | EN_DRV | EN_OLSC | BRG_MODE | LOCK | CLR_FLT | R/W | 07h | |||
IC_CTRL2 | DIS_SSC | DRVOFF_nFLT | CP_MODE | WD_EN | WD_FLT_M | WD_WIN | WD_RST | R/W | 08h | |
BRG_CTRL1 | HB1_CTRL | HB2_CTRL | HB3_CTRL | HB4_CTRL | R/W | 09h | ||||
BRG_CTRL2 | S_IN1/EN1 | S_IN2/PH1 | HIZ1 | RSVD | S_IN3/EN2 | S_IN4/PH2 | HIZ2 | RSVD | R/W | 0Ah |
PWM_CTRL1 | HB1_PWM | HB2_PWM | HB3_PWM | HB4_PWM | R/W | 0Bh | ||||
PWM_CTRL2 | IN1/EN1_MODE | IN2/PH1_MODE | FW1 | RSVD | IN3/EN2_MODE | IN4/PH2_MODE | FW2 | RSVD | R/W | 0Ch |
PWM_CTRL3 | HB1_HL | HB2_HL | HB3_HL | HB4_HL | RSVD | R/W | 0Dh | |||
PWM_CTRL4 | HB1_FW | HB2_FW | HB3_FW | HB4_FW | RSVD | R/W | 0Eh | |||
IDRV_CTRL1 | IDRVP_1 | IDRVN_1 | R/W | 0Fh | ||||||
IDRV_CTRL2 | IDRVP_2 | IDRVN_2 | R/W | 10h | ||||||
IDRV_CTRL3 | IDRVP_3 | IDRVN_3 | R/W | 11h | ||||||
IDRV_CTRL4 | IDRVP_4 | IDRVN_4 | R/W | 12h | ||||||
IDRV_CTRL5 | RSVD | R/W | 13h | |||||||
IDRV_CTRL6 | RSVD | R/W | 14h | |||||||
IDRV_CTRL7 | RSVD | R/W | 15h | |||||||
IDRV_CTRL8 | RSVD | R/W | 16h | |||||||
IDRV_CTRL9 | IDRV_LO1 | IDRV_LO2 | IDRV_LO3 | IDRV_LO4 | RSVD | R/W | 17h | |||
DRV_CTRL1 | VGS_MODE | VGS_IND | VGS_LVL | VGS_HS_DIS | VDS_MODE | VDS_IND | R/W | 18h | ||
DRV_CTRL2 | RSVD | VGS_TDRV_1 | VGS_TDRV_2 | R/W | 19h | |||||
DRV_CTRL3 | RSVD | VGS_TDRV_3 | VGS_TDRV_4 | R/W | 1Ah | |||||
DRV_CTRL4 | VGS_TDEAD_1 | VGS_TDEAD_2 | VGS_TDEAD_3 | VGS_TDEAD_4 | R/W | 1Bh | ||||
DRV_CTRL5 | VDS_DG_1 | VDS_DG_2 | VDS_DG_3 | VDS_DG_4 | R/W | 1Ch | ||||
DRV_CTRL6 | VDS_IDRVN_1 | VDS_IDRVN_2 | VDS_IDRVN_3 | VDS_IDRVN_4 | R/W | 1Dh | ||||
DRV_CTRL7 | RSVD | R/W | 1Eh | |||||||
VDS_CTRL1 | VDS_LVL_1 | VDS_LVL_2 | R/W | 1Fh | ||||||
VDS_CTRL2 | VDS_LVL_3 | VDS_LVL_4 | R/W | 20h | ||||||
VDS_CTRL3 | RSVD | R/W | 21h | |||||||
VDS_CTRL4 | RSVD | R/W | 22h | |||||||
OLSC_CTRL1 | PU_SH_1 | PD_SH_1 | PU_SH_2 | PD_SH_2 | PU_SH_3 | PD_SH_3 | PU_SH_4 | PD_SH_4 | R/W | 23h |
OLSC_CTRL2 | RSVD | R/W | 24h | |||||||
UVOV_CTRL | PVDD_UV_MODE | PVDD_OV_MODE | PVDD_OV_DG | PVDD_OV_LVL | VCP_UV_MODE | VCP_UV_LVL | R/W | 25h | ||
CSA_CTRL1 | RSVD | CSA_DIV_1 | CSA_GAIN_1 | CSA_DIV_2 | CSA_GAIN_2 | R/W | 26h | |||
CSA_CTRL2 | RSVD | CSA_BLK_SEL_1 | CSA_BLK_1 | R/W | 27h | |||||
CSA_CTRL3 | RSVD | CSA_BLK_SEL_2 | CSA_BLK_2 | R/W | 28h | |||||
RSVD_CTRL | RSVD | R/W | 29h |
DRV8714-Q1 Advanced Function Register Map provides advanced control functions described in the Propagation Delay Reduction (PDR), Duty Cycle Compensation (DCC), and Slew Time Control (STC) sections. These are not necessary for typical use cases of the DRV871x-Q1 and may be utilized as needed to meet specific system requirements.
Name | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | Type | Addr. |
---|---|---|---|---|---|---|---|---|---|---|
AGD_CTRL1 | AGD_THR | AGD_ISTRONG | RSVD | R/W | 2Ah | |||||
PDR_CTRL1 | PRE_MAX_1 | T_DON_DOFF_1 | R/W | 2Bh | ||||||
PDR_CTRL2 | PRE_MAX_2 | T_DON_DOFF_2 | R/W | 2Ch | ||||||
PDR_CTRL3 | PRE_MAX_3 | T_DON_DOFF_3 | R/W | 2Dh | ||||||
PDR_CTRL4 | PRE_MAX_4 | T_DON_DOFF_4 | R/W | 2Eh | ||||||
PDR_CTRL5 | T_PRE_CHR_1 | T_PRE_DCHR_1 | PRE_CHR_INIT_1 | PRE_DCHR_INIT_1 | R/W | 2Fh | ||||
PDR_CTRL6 | T_PRE_CHR_2 | T_PRE_DCHR_2 | PRE_CHR_INIT_2 | PRE_DCHR_INIT_2 | R/W | 30h | ||||
PDR_CTRL7 | T_PRE_CHR_3 | T_PRE_DCHR_3 | PRE_CHR_INIT_3 | PRE_DCHR_INIT_3 | R/W | 31h | ||||
PDR_CTRL8 | T_PRE_CHR_4 | T_PRE_DCHR_4 | PRE_CHR_INIT_4 | PRE_DCHR_INIT_4 | R/W | 32h | ||||
PDR_CTRL9 | EN_PDR_1 | RSVD | KP_PDR_1 | EN_PDR_2 | RSVD | KP_PDR_2 | R/W | 33h | ||
PDR_CTRL10 | EN_PDR_3 | RSVD | KP_PDR_3 | EN_PDR_4 | RSVD | KP_PDR_4 | R/W | 34h | ||
STC_CTRL1 | T_RISE_FALL_1 | EN_STC_1 | STC_ERR_1 | KP_STC_1 | R/W | 35h | ||||
STC_CTRL2 | T_RISE_FALL_2 | EN_STC_2 | STC_ERR_2 | KP_STC_2 | R/W | 36h | ||||
STC_CTRL3 | T_RISE_FALL_3 | EN_STC_3 | STC_ERR_3 | KP_STC_3 | R/W | 37h | ||||
STC_CTRL4 | T_RISE_FALL_4 | EN_STC_4 | STC_ERR_4 | KP_STC_4 | R/W | 38h | ||||
DCC_CTRL1 | EN_DCC_1 | EN_DCC_2 | EN_DCC_3 | EN_DCC_4 | IDIR_MAN_1 | IDIR_MAN_2 | IDIR_MAN_3 | IDIR_MAN_4 | R/W | 39h |
PST_CTRL1 | FW_MAX_1 | FW_MAX_2 | FW_MAX_3 | FW_MAX_4 | EN_PST_DLY_1 | EN_PST_DLY_2 | EN_PST_DLY_3 | EN_PST_DLY_4 | R/W | 3Ah |
PST_CTRL2 | KP_PST_1 | KP_PST_2 | KP_PST_3 | KP_PST_4 | R/W | 3Bh | ||||
SGD_STAT1 | IDIR_1 | IDIR_2 | IDIR_3 | IDIR_4 | IDIR_WARN_1 | IDIR_WARN_2 | IDIR_WARN_3 | IDIR_WARN_4 | R | 3Ch |
SGD_STAT2 | PCHR_WARN_1 | PCHR_WARN_2 | PCHR_WARN_3 | PCHR_WARN_4 | PDCHR_WARN_1 | PDCHR_WARN_2 | PDCHR_WARN_3 | PDCHR_WARN_4 | R | 3Dh |
SGD_STAT3 | STC_WARN_F_1 | STC_WARN_F_2 | STC_WARN_F_3 | STC_WARN_F_4 | STC_WARN_R_1 | STC_WARN_R_2 | STC_WARN_R_3 | STC_WARN_R_4 | R | 3Eh |