JAJSM24A December 2023 – May 2024 ADC3910D025 , ADC3910D065 , ADC3910D125 , ADC3910S025 , ADC3910S065 , ADC3910S125
PRODUCTION DATA
ADC3910Dx および ADC3910Sx by default is set to internal reference. For highest accuracy and lowest temperature drift, the ADC3910Dx および ADC3910Sx provides an option to supply a external reference voltage to the ADC. A 10 µF and a 0.1 µF ceramic bypass capacitor connected between VREF and GND pins, and placed as close to the pins as possible is recommended when using an external reference. Otherwise, the VREF pin should be connected to ground when using the internal reference. The internal reference circuitry of the ADC3910Dx および ADC3910Sx is shown in Figure 6-7.