The recommended bias supply voltage range for LMG3100 is from 4.75 V to 5.25 V. The lower end of this range is governed by the internal undervoltage lockout (UVLO) protection feature of the V_CC supply circuit. The upper end of this range is driven by the 6 V absolute maximum voltage rating of V_CC. Note that the gate voltage of the low-side GaN FET is not clamped internally. Hence, it is important to keep the V_CC bias supply within the recommended operating range to prevent exceeding the low-side GaN transistor gate breakdown voltage.

The UVLO protection feature also involves a hysteresis function. This means that once the device is operating in normal mode, if the V_CC voltage drops, the device continues to operate in normal mode as far as the voltage drop does not exceeds the hysteresis specification, V_CC(hyst). If the voltage drop is more than hysteresis specification, the device shuts down. Therefore, while operating at or near the 4.5 V range, the voltage ripple on the auxiliary power supply output must be smaller than the hysteresis specification of LMG3100 to avoid triggering device-shutdown.

Place a local bypass capacitor between the VDD and VSS pins. This capacitor must be located as close as possible to the device. A low ESR, ceramic surface-mount capacitor is recommended. TI recommends using 2 capacitors across VDD and GND: a 100 nF ceramic surface-mount capacitor for high frequency filtering placed very close to VDD and GND pin, and another surface-mount capacitor, 220 nF to 10 μF, for IC bias requirements.