SBAU412A November   2022  – May 2024 AFE7900 , AFE7903 , AFE7906 , AFE7920 , AFE7921 , AFE7950

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 Prerequisites
  6. 3 Typical Bare-Metal Design Flow
  7. 4 Background
  8. 5 Add Microblaze and SPI IP for Use in Vitis for Embedded Development
  9. 6 Create New Platforms in Vitis
  10. 7 Create New Application Projects in Vitis
  11. 8 Build Application Projects
  12. 9 Generate SPI Log for AFE79xx EVM
    1. 9.1 Generating the LMK SPI Log
    2. 9.2 Generating the AFE SPI Log
    3. 9.3 Converting SPI Logs to Format for Vitis
  13. 10AFE79xxEVM Board Modifications
  14. 11Configure the AXI GPIO
    1. 11.1 Initializing the GPIO
    2. 11.2 Setting the Direction
    3. 11.3 Setting High or Low for Corresponding Bits
  15. 12Configure the AXI SPI
  16. 13Set Up and Power on Hardware
  17. 14Set up ZCU102 Board Interface for VADJ_FMC
  18. 15Debug Application Projects and Set up Vitis Serial Terminal
  19. 16Execute the Application
  20. 17Revision History

10 AFE79xxEVM Board Modifications

To connect AFE SPI to the FPGA, the modifications below must be made:

  1. Remove R266, R267, R268, and R274 (Found on the bottom of the EVM).
  2. Install 0Ω resistors for R88, R87, R86, and R83 (Found on the top of the EVM).
AFE7920

The LMK SPI has no connection to the FMC connector, so for the FPGA to control the LMK SPI the following board modifications must be made.

  1. Connect LMK_SCK to SPIACLK (Wire from R88 to R248).
  2. Connect LMK_SDIO to SPIASDIO (Wire from R87 to R249).
  3. Connect LMK_CS to pin D26 of the of the FMC connector.
    1. To do this a wire can be connected from R242 to the open pad of R9 that is connected to the FMC.