SFFS525A September   2022  – November 2022 UCC28C50 , UCC28C51 , UCC28C52 , UCC28C53 , UCC28C54 , UCC28C55 , UCC28C56L , UCC28C57H , UCC28C57L , UCC28C58 , UCC28C59

 

  1. 1Overview
  2. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 SOIC (8) Package
    2. 2.2 VSSOP (8) Package
  3. 3Failure Mode Distribution (FMD)
  4. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 SOIC (8) and VSSOP (8) Packages
  5. 5Revision History

SOIC (8) and VSSOP (8) Packages

Figure 4-1 shows the UCCx8C5x pin diagram for the SOIC (8) and VSSOP (8) packages. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the UCCx8C5xdata sheet.

Figure 4-1 Pin Diagram SOIC (8) and VSSOP (8) Packages
Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
COMP1OUT zero duty cycle, output loss of regulation. Possible IC damageB
FB2COMP pin go high, OUT excessive duty-cycle, output loss of regulation. B
CS3Maximum OUT duty-cycle, loss of regulation, likely damage to power switchB
RT/CT4Oscillator stops, OUT zero duty cycle, output loss of regulationB
GND5N/AD
OUT6OUT remains low, zero duty cycle. Likely IC damageA
VDD7IC not biased, OUT zero duty cycle, output loss of regulationB
VREF8OUT zero duty cycle, output loss of regulation, possible IC damageA
Table 4-3 Pin FMA for Device Pins Open-Circuited
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
COMP1Regulation loop becomes unstable, oscillation may resultC
FB2COMP stays high, OUT excessive duty-cycle, output loss of regulationB
CS3CS pin stays high, OUT zero duty cycle, output loss of regulationB
RT/CT4Oscillator stops, OUT zero duty cycle, output loss of regulationB
GND5Internal GND pulled up to 0.65 V, IC behavior unpredictableB
OUT6OUT at maximum duty cycle, output loss of regulation B
VDD7IC not biased, OUT at zero duty cycle, output loss of regulationB
VREF8VREF reglator unstable and oscillates, output oscillatesC
Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin NamePin No.Shorted toDescription of Potential Failure Effect(s)Failure Effect Class
COMP1FBCOMP at VREF level, OUT excessive duty cycle, output loss of regulationB
FB2CSCOMP stays at high, OUT excessive duty cycle, output loss of regulationB
CS3RT/CTOscillator stops, OUT zero duty cycle, output loss of regulationB
RT/CT4N/AD
GND5OUTOUT stays low, OUT zero duty cycle, output loss of regulation, likely IC damageA
OUT6VDDOUT stays high, 100% duty cycle, likely IC and power supply damageA
VDD7VREFVREF excess Abs max rating, IC damage, output loss of regulationA
VREF8N/AD
Table 4-5 Pin FMA for Device Pins Short-Circuited to supply
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
COMP1Possible IC damange. OUT excessive duty cycle, output loss of regulationA
FB2Excess Abs. Max rating, IC damage. OUT excessive duty cycle, output loss of regulationA
CS3Excess Abs. Max rating, IC damage, OUT zero duty cycle, output loss of regulationA
RT/CT4Excess Abs. Max rating, IC damage, OUT zero duty cycle, output loss of regulationA
GND5IC is not biased. OUT zero duty cycle, output loss of regulationB
OUT6OUT stays high, 100% duty cycle, likely IC and power supply damageA
VDD7N/AD
VREF8VREF excess Abs max rating, IC damage, output loss of regulationA