SLAAEO5 September 2024 MSPM0C1103 , MSPM0C1103-Q1 , MSPM0C1104 , MSPM0C1104-Q1 , MSPM0G1105 , MSPM0G1106 , MSPM0G1107 , MSPM0G1505 , MSPM0G1506 , MSPM0G1507 , MSPM0G1519 , MSPM0G3105 , MSPM0G3105-Q1 , MSPM0G3106 , MSPM0G3106-Q1 , MSPM0G3107 , MSPM0G3107-Q1 , MSPM0G3505 , MSPM0G3505-Q1 , MSPM0G3506 , MSPM0G3506-Q1 , MSPM0G3507 , MSPM0G3507-Q1 , MSPM0G3519 , MSPM0L1105
When a user misconfigures their clock, disable debug access via nonmain (1), or program incorrect values into the CRC registers of nonmain, this disables access to the MSPM0. An understanding of the SEC-AP is vital when adding support for MSPM0 as it is utilized for device recovery in cases of peripheral or nonmain misconfiguration. Previously said recovery is done by sending a Debug Sub-System Mailbox (DSSM) command into the mailbox and then executing it by performing a BOOTRST. It is also possible to unlock debug access in the scenario that it is disabled with or without a password while debug port access is still enabled.