SLAU367P October 2012 – April 2020 MSP430FR5041 , MSP430FR5043 , MSP430FR50431 , MSP430FR5847 , MSP430FR58471 , MSP430FR5848 , MSP430FR5849 , MSP430FR5857 , MSP430FR5858 , MSP430FR5859 , MSP430FR5867 , MSP430FR58671 , MSP430FR5868 , MSP430FR5869 , MSP430FR5870 , MSP430FR5872 , MSP430FR58721 , MSP430FR5887 , MSP430FR5888 , MSP430FR5889 , MSP430FR58891 , MSP430FR5922 , MSP430FR59221 , MSP430FR5947 , MSP430FR59471 , MSP430FR5948 , MSP430FR5949 , MSP430FR5957 , MSP430FR5958 , MSP430FR5959 , MSP430FR5962 , MSP430FR5964 , MSP430FR5967 , MSP430FR5968 , MSP430FR5969 , MSP430FR5969-SP , MSP430FR59691 , MSP430FR5970 , MSP430FR5972 , MSP430FR59721 , MSP430FR5986 , MSP430FR5987 , MSP430FR5988 , MSP430FR5989 , MSP430FR5989-EP , MSP430FR59891 , MSP430FR5992 , MSP430FR5994 , MSP430FR59941 , MSP430FR6005 , MSP430FR6007 , MSP430FR6035 , MSP430FR6037 , MSP430FR60371 , MSP430FR6041 , MSP430FR6043 , MSP430FR60431 , MSP430FR6045 , MSP430FR6047 , MSP430FR60471 , MSP430FR6820 , MSP430FR6822 , MSP430FR68221 , MSP430FR6870 , MSP430FR6872 , MSP430FR68721 , MSP430FR6877 , MSP430FR6879 , MSP430FR68791 , MSP430FR6887 , MSP430FR6888 , MSP430FR6889 , MSP430FR68891 , MSP430FR6920 , MSP430FR6922 , MSP430FR69221 , MSP430FR6927 , MSP430FR69271 , MSP430FR6928 , MSP430FR6970 , MSP430FR6972 , MSP430FR69721 , MSP430FR6977 , MSP430FR6979 , MSP430FR69791 , MSP430FR6987 , MSP430FR6988 , MSP430FR6989 , MSP430FR69891
Power Management Module Control Register 0
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| PMMPW | |||||||
| rw-1 | rw-0 | rw-0 | rw-1 | rw-0 | rw-1 | rw-1 | rw-0 |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| Reserved | SVSHE | Reserved | PMMREGOFF | PMMSWPOR | PMMSWBOR | Reserved | |
| rw-[0] | rw-[1] | r0 | rw-[0] | rw-(0) | rw-[0] | r0 | r0 |
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 15-8 | PMMPW | RW | 96h | PMM password. Always reads as 096h. Must be written with 0A5h to unlock the PMM registers. |
| 7 | Reserved | RW | 0h | Reserved. Must be written with 0. |
| 6 | SVSHE | RW | 1h | High-side SVS enable.
0b = High-side SVS (SVSH) is disabled in LPM2, LPM3, LPM4, LPM3.5, and LPM4.5. SVSH is always enabled in active mode, LPM0, and LPM1. 1b = SVSH is always enabled. |
| 5 | Reserved | R | 0h | Reserved. Always reads as 0. |
| 4 | PMMREGOFF | RW | 0h | Regulator off
0b = Regulator remains on when going into LPM3 or LPM4 1b = Regulator is turned off when going to LPM3 or LPM4. System enters LPM3.5 or LPM4.5, respectively. |
| 3 | PMMSWPOR | RW | 0h | Software POR. Setting this bit to 1 triggers a POR. This bit is self clearing.
0b = Normal operation 1b = Set to 1 to trigger a POR |
| 2 | PMMSWBOR | RW | 0h | Software brownout reset. Setting this bit to 1 triggers a BOR. This bit is self clearing.
0b = Normal operation 1b = Set to 1 to trigger a BOR |
| 1-0 | Reserved | R | 0h | Reserved. Always reads as 0. |