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UCBxCTL1 |= UCSWRST; // eUSCI_B in reset state
UCBxCTLW0 |= UCMODE_3; // I2C slave mode
UCBxI2COA0 = 0x0412; // own address is 12hex
P2SEL |= 0x03; // configure I2C pins (device specific)
UCBxCTL1 &= ^UCSWRST; // eUSCI_B in operational state
UCBxIE |= UCTXIE + UCRXIE; // enable TX&RX-interrupt
GIE; // general interrupt enable
...
// inside the eUSCI_B TX interrupt service routine
UCBxTXBUF = 0x77; // send 077h
...
// inside the eUSCI_B RX interrupt service routine
data = UCBxRXBUF; // data is the internal variable
As shown in Example 2, all configurations must be done while UCSWRST is set. For the slave, I2C operation is selected by setting UCMODE. The slave address is specified in the UCBxI2COA0 register. To enable the interrupts for receive and transmit requests, the according bits in UCBxIE and, at the end, GIE need to be set. Finally the ports must be configured. This step is device dependent; see the data sheet for the pins that are used.
The RX interrupt service routine is called for every byte received by a master device. The TX interrupt service routine is executed each time the master requests a byte. The recommended structure of the interrupt service routine can be found in Example 3.