SLUAA11B February 2020 – August 2021 BQ769142 , BQ76922 , BQ76942 , BQ76952
Subcommands use a different format from direct commands and are accessed indirectly using the 7-bit command address space. They also provide the capability for block transfers. To issue a subcommand, the command address is written to 0x3E/0x3F. If data is to be read back, it will be populated in the 32-byte transfer buffer which uses addresses 0x40 - 0x5F. Multiple examples follow.
The timing required for the device to fetch data depends on the specific subcommand and any other processing underway within the device, so it will vary during operation. The approximate times for each subcommand are shown in the Technical Reference Manual. There are two approaches for addressing this timing when reading data from a subcommand:
Certain subcommands write data to a register and must be followed by a write to 0x60/0x61 with the checksum and length. This only applies to the FET_Control(), REG12_Control(), CB_Active_Cells(), and CB_SET_LVL() subcommands. Examples for calculating checksum and length are provided in the next section since this is also required when writing to RAM registers.