2 Setup

To evaluate the effect of high-voltage stress on the device, a set of 35 devices were tested using the procedure described below.

1. The devices were first tested, and selected parameters were logged for later comparison.
2. The OTP in each device was programmed such that the charge pump would be powered and the high-side CHG and DSG protection FET drivers would be enabled by default during the testing.
3. Selected pins on each device were connected through passive components to a single voltage source (initially set to 0 V), as shown in the schematic in Figure 2-1.
4. The circuit was placed into an oven and the voltage source was slowly ramped from 0 V to 120 V with a rise time of approximately 5 seconds. The voltage source was limited to an output current of 5 mA.
5. With the 120-V source held constant, the oven was heated to 85°C over the course of approximately 10 minutes.
6. The voltage source was powered down, and the devices were removed from the oven.
7. Devices were retested, and the selected parameters were logged and compared to those taken earlier.

Figure 2-1 Schematic of System Used for Voltage Stress