SLVA857B July 2018 – January 2023 TPS50601-SP , TPS50601A-SP , TPS7H1101-SP , TPS7H1101A-SP , TPS7H3301-SP , TPS7H4001-SP
All specifications for the RTG4 are taken from Microsemi (RTG4 FPGS Data Sheet (Rev. 4) [3] and application reports [4].
Symbol | Parameter | Min | Typ | Max | Units |
---|---|---|---|---|---|
VDD | DC FPGA core supply voltage. Must always power this pin. | 1.14 | 1.2 | 1.26 | V |
VPP | Power supply for charge pumps (for normal operation and programming). Must always power this pin. | 3.15 | 3.3 | 3.45 | V |
VDDPLL | Power for eight corner PLLs, PLLs in SERDES PCIe/PCS blocks, and FDDR PLL. | 3.15 | 3.3 | 3.45 | V |
SERDES_x_Lyz_VDDAIO | Tx/Rx analog I/O voltage. Low voltage power for lane-y and Lane-z of SERDES_x. It is a +1.2-V SERDES PMA supply. | 1.14 | 1.2 | 1.26 | V |
SERDES_x_Lyz_VDDAPLL | Analog power for SERDES_x PLL lanes yz. It is a +2.5-V SERDES internal PLL supply. | 2.375 | 2.5 | 2.625 | V |
SERDES_VDDI | Power for SERDES reference clock receiver 1.8-V supply. Must always power this pin. | 1.71 | 1.8 | 1.89 | V |
Power for SERDES reference clock receiver 2.5-V supply. Must always power this pin. | 2.375 | 2.5 | 2.625 | ||
Power for SERDES reference clock receiver 3.3-V supply. Must always power this pin. | 3.15 | 3.3 | 3.45 | ||
SERDES_VREF | Reference voltage for SERDES receiver reference clocks. | 0.49 × SERDES_VDDI | 0.5 × SERDES_VDDI | 0.51 × SERDES_VDDI | V |
VDDIx | 1.2-V DC supply voltage for FPGA I/O banks. | 1.14 | 1.2 | 1.26 | V |
1.5-V DC supply voltage for FPGA I/O banks. | 1.425 | 1.5 | 1.575 | ||
1.8-V DC supply voltage for FPGA and JTAG I/O banks. | 1.71 | 1.8 | 1.89 | ||
2.5-V DC supply voltage for FPGA and JTAG I/O banks. | 2.375 | 2.5 | 2.625 | ||
3.3-V DC supply voltage for FPGA and JTAG I/O banks. | 3.15 | 3.3 | 3.45 | ||
DC supply voltage for LVDS25 differential I/O banks. | 2.375 | 2.5 | 2.625 | ||
DC supply voltage for LVDS33 differential I/O banks. | 3.15 | 3.3 | 3.45 | ||
DC supply voltage for BLVDS, MLVDS, Mini- LVDS, RSDS differential I/O banks. | 2.375 | 2.5 | 2.625 | ||
DC supply voltage for LVPECL differential I/O banks. | 3.15 | 3.3 | 3.45 |