SLVAFD4 February 2024 TPS54308 , TPS54320 , TPS54350 , TPS54620 , TPS54622 , TPS54821 , TPS54824 , TPS62933F

2 Components Selection for Secondary Stage Filter

Figure 2-1 shows the scheme of buck converter with second stage filter. A second-order low pass filter is formed by inductor L₂ and capacitor C₂. A new pair of conjugate poles is introduced with the filter, which can reduce the output voltage ripple and noise at switching frequency through the high frequency gain attenuation. The selection method of inductor L₂ and capacitor C₂ is analyzed in this section.

Figure 2-1 Buck Converter with Second Stage Filter

In several previous studies, the expression of output voltage ripple after the 1^st stage LC filter is already derived, as shown in Equation 1. Also see the Output Ripple Voltage for Buck Switching Regulator application note.

Equation 1.

V_{o1-ripple} = \frac{V_{o} (1- \frac{V_{o}}{V_{in}})}{f_{sw} L} (r_{c} + \frac{1}{8 f_{sw} C_{o}})

where, V_o1-ripple is the peak to peak amplitude of output voltage ripple after 1^st stage. V_o is output voltage and V_in is input voltage of buck converter. f_sw is switching frequency. L and C_o are the inductance and capacitance of the 1^st stage filter respectively. r_c is the ESR of capacitor C_o.

The transfer function of second stage filter is shown as Equation 2.

Equation 2.

G_{vv-2nd} (s)= \frac{R_{L}}{s^{2} R_{L} {L_{2} C}_{2} +s L_{2} + R_{L}}

where R_L is output load resistance. Since MLCC is normally used as capacitor C₂ to reduce output ripple for second stage, the ESR of C₂ is ignored.

A pair of conjugate poles is included in transfer function Equation 2. The poles frequency can be approximately expressed as Equation 3. The loop gain amplitude plot is shown as Figure 2-2.

Equation 3.

f_{2} ≈ \frac{1}{2π} \sqrt{\frac{1}{L_{2} C_{2}}}

Figure 2-2 Loop Gain Magnitude Plot of Equation (2)

To simplify the relation, the effects of conjugate poles quality factor are ignored and the gain is seen as attenuation with -40dB/dec slope after frequency f₂. The relation as Equation 4 can be derived then.

Equation 4.

\frac{0dB-20lg (A_{sw})}{lg (f_{2}) -lg (f_{sw})} =-40dB/dec

where, A_sw is the gain amplitude at switching frequency f_sw.

The expression of A_sw can be derived with Equation 5.

Equation 5.

A_{sw} = \frac{{f_{2}}^{2}}{{f_{sw}}^{2}} = \frac{1}{{4 π^{2} f}_{sw}^{2} L_{2} C_{2}}

Applying the attenuation gain A_sw on V_o-1ripple, second stage ripple V_o2-ripple is expressed as Equation 6.

Equation 6.

V_{o2-ripple} = A_{sw} V_{o1-ripple} = \frac{V_{o} (1- \frac{V_{o}}{V_{in}}) (r_{c} + \frac{1}{8 f_{sw} C_{o}})}{{4 π^{2} f}_{sw}^{3} L L_{2} C_{2}}

To meet the requirement V_o2-ripple≤V_{o2-ripple-target}, the limitation for the selection of L₂ and C₂ can be received with Equation 7.

Equation 7.

L_{2} C_{2} ≥ \frac{V_{o} (1- \frac{V_{o}}{V_{in}}) (r_{c} + \frac{1}{8 f_{sw} C_{o}})}{{4 π^{2} f}_{sw}^{3} L V_{o2-ripple-target}}

As shown, only the limitation for (L₂ x C₂) is given in Equation 7, while no limitation is given for L₂ and C₂ respectively. The inductance and capacitance can be determined with the consideration of BOM cost, DCR loss, and so on.

In Part II of this application note series, the impacts of added passive filter on loop stability can be further analyzed and the components selection range with stability restriction can be further derived then. The completed components selection range and application design method is received by considering both output voltage ripple restriction in this paper and stability restriction in next papers.