SLVAFQ5 December   2023 TPS51383 , TPS51385 , TPS51386

PRODUCTION DATA  

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Zcap Calculation of Hybrid Capacitors
  6. 3Experimental Verification
  7. 4Loop Stability Analysis With Hybrid Output Capacitor Network
  8. 5Application Design Example of D-CAP3 Converter With a Hybrid Output Capacitors Network
  9. 6Summary
  10. 7References

3 Experimental Verification

To verify the calculation results in the previous section, the TPS51386EVM is used as an example to perform bench loop test and the Bode plot is used for loop analysis. The TPS51386 is a 4.5-V to 24-V input, 8-A synchronous buck converter with adaptive on-time D-CAP3 control mode.

The experimental conditions are: Vin= 20 V, Vo= 3.3 V, Iout= 8 A, fsw= 600 kHz, L= 1.5 µH, C1= 22 µF×4, total effective capacitance of ≅59 µF, with total 0.5-mΩ ESR and C2= 220 µF, with 20-mΩ ESR. The zero of internal ripple injection of TPS51386 ωRI is approximately 45 kHz.

Equation 5 through Equation 8 are used to calculated the zero and pole, the result is ω0= 7.8 kHz, ωz_C1= 5.40 MHz, ωz_C2= 36.2 kHz, and ωp_C2= 167 kHz.

Figure 3-1 shows the Bode plot test results of the EVM board with the position of turning frequency marked. The result of the amplitude gain curve shows that the conversion frequency corresponds to the calculated frequency of zero and pole. This plot also verifies that the previous calculation is accurate.

GUID-20231217-SS0I-SSK8-MSHN-HWVFB2MLQC8P-low.svgFigure 3-1 The Bode Plot Results of Bench Loop Test