SLVUCU6A November 2023 – October 2024
There are seven headers available to configure the EVM function, some of which are shown in Figure 2-2. Header J20 is used to configure the EVM to match the feature setting written to the TPS6522x configuration registers. J32 is used to select the PMIC IO voltage, either 1.8 V or 3.3 V. J25 allows VCCA to be powered from the USB connection and the configuration of GPIO2 as I2C2 or SPI. Header J33 is used to enable the device and J14 together with J29 are used to configure the ADC input. J19 is used to configure the nINT/EN_DRV pin to the correct LED. Refer to Section 2.2.6 for more information on J19.
Option Pins | Configuration | Description | |
---|---|---|---|
SPI_EN | Open (Default) | I2C Mode. The signal path for I2C communication between the MCU and the PMIC is enabled. | |
Closed | SPI mode. The signal path for SPI communication between the MCU and the PMIC is enabled. | ||
GPIO1, SDA2/SDO | Open | GPIO mode. GPIO1 from PMIC is connected to PM0 of the MCU through a level translator. | |
Closed (default) | I2C Mode (J20 SPI_EN: Open) | Q&A Watchdog mode. GPIO1 of the PMIC must be in the alternative function to support the Q&A Watchdog and the I2C mode is selected. This setting must also be done on connector J25 by closing GPIO2 to SCL2/CS0 if I2C2 is wanted to be used. | |
SPI mode (J20 SPI_EN: Closed) | SPI mode, Chip Select. GPIO1 and GPIO2 of the PMIC must be in the alternative function to support SPI communication. This setting must also be done on connector J25 by closing GPIO2 to SCL2/CS if SPI is wanted to be used. | ||
GPIO6, nERR_MCU | Open (default) | GPIO mode. GPIO6 of the PMIC is connected to PQ1 of the MCU through a level translator. | |
Closed | System error countdown input signal from the MCU. GPIO6 of the PMIC must be in the alternative function to support the system error count down from the MCU. | ||
GPIO2, TRIG_WDOG | Open (default) | GPIO mode. GPIO2 of the PMIC is connected to PM7 of the MCU through a level translator. | |
Closed | Trigger signal for trigger mode watchdog. GPIO2 of the PMIC must be in the alternative function to support the trigger mode watchdog signal. |
Configuration | Description |
---|---|
Open | Not Allowed, 1.8 V or 3.3 V must be selected. |
VIO Select, 3.3 V: Closed (Default) | VIO is 3.3 V. |
VIO Select, 1.8 V: Closed | VIO is 1.8 V. |
Configuration | Description | |
---|---|---|
3.3V, VCCA: Closed (Default) | 3.3 V from TLV733P-Q1 (U11) is connected to VCCA. The input for U11 is the 5 V from the USB connection (VBUS). VBUS is not intended to support heavy load conditions. 2 W must be the maximum power drawn from the USB. | |
EN_5V0, 3.3V: Open and VCCA, 5.0V: Open | On board 5 V regulator is disabled and VCCA isolated from other on board supplies. VCCA must be powered from J9. | |
EN_5V0, 3.3V: Closed | 5 V on board regulator (powered from USB) is enabled. 5 V regulated supply can be used to power VCCA. | |
VCCA, 5.0V: Closed | 5 V on board regulator (powered from USB) is connected to the TPS6522x VCCA. 5 V on board regulator is not intended for heavy load condition. | |
GPIO2, SCL2/CS0: Open | GPIO mode. GPIO2 of the PMIC is connected to PM7 of the MCU. | |
GPIO2, SCL2/CS0: Closed (Default) | I2C mode (J20 SPI_EN: Open) | Q&A Watchdog mode. GPIO1 and GPIO2 of the PMIC must be in the alternative function to support the Q&A Watchdog and the I2C mode selected. This setting must also be done on connector J20 by closing GPIO1 to SDA2/SDO if I2C2 is wanted to be used. |
SPI mode (J20 SPI_EN: Closed) | SPI mode, Chip Select. GPIO1 and GPIO2 of the PMIC must be in the alternative function to support SPI communication. This setting must also be done on connector J20 by closing GPIO1 to SDA2/SDO. |
The PMIC device can be configured for a power good level of 3.3 V or 5.0 V for the VCCA pin. If VCCA_VMON feature is enabled, then check that the input voltage is correct and use sense connection to compensate IR voltage drop with heavy load currents. Align the VCCA/3.3V/5.0V jumper with the PMIC configuration. The default PMIC configuration is monitoring for 3.3 V VCCA voltage through LDO2 which is configured as load switch. This monitoring is enabled when the rails are enabled.
The TPS6522x has EN/PB/VSENSE pin that is used to enable the PMIC. This pin can be configured to work as enable, push-button or voltage sense input. In TPS6522430-Q1, which is populated by default on the EVM, this pin is configured as VSENSE to sense the battery voltage through a voltage divider as shown in Figure 1-1. The GPIO3 can also be configured as push-button input if EN/PB/VSENSE is not configured as push-button input. The J33 configuration header must be used to match the EVM to the PMIC configuration. Refer to Table 2-6 for all the options of the J33. For more details, please see Section 4.1.
Jumper Option | Description |
---|---|
EN/PB/VSENSE, VCCA | VCCA is connected directly to EN/PB/VSENSE. |
EN/PB/VSENSE, PB | EN/PB/VSENSE is connected to push button S3. A resistor pulls the pin high when not pressed. When pressed, EN/PB/VSENSE is connected to ground. |
GPIO3, PB | GPIO3 is connected to push button S3. A resistor pulls the pin high when not pressed. When pressed, EN/PB/VSENSE is connected to ground. |
Some TPS6522x devices, including TPS6522430-Q1, have a built-in 12-bit ADC, which can be used to either monitor the junction temperature of the device or an external DC signal. GPIO4 and GPIO5 can be used as the inputs for the ADC. Configuration headers J14 and J29 can be used to connect different signals to the appropriate GPIO pin. Refer to Table 2-7 for connection options and descriptions. For more details, please see Section 4.1.
Configuration Header | Jumper Option | Description |
---|---|---|
J29 | GPIO4, ADCIN | Connects GPIO4 to J14 middle pin. |
GPIO5, ADCIN | Connects GPIO5 to J14 middle pin. | |
J14 | TEMP, middle pin | Connects resistive divider using NTC thermistor to the middle pin (not available in the IPP016E1 version). |
VCCA, middle pin | Connects VCCA through a resistive divider to the middle pin. |