SLYA042 July   2024 FDC1004 , FDC1004-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 CSAs and Input Bias Stage
  6. 3 CSA and Gain Error Factor
  7. 4 Applications for Resistance at Input Pins of Current Sense Amplifiers
    1. 4.1 Input Resistance Design Considerations
  8. 5 Applications for Input Resistance at Reference Pins of Current Sense Amplifiers
    1. 5.1 Bidirectional CSA and Applications
    2. 5.2 Driving CSA Reference Pin With High-Resistance Source Voltage
    3. 5.3 Input Resistance at Reference Pin Design Considerations
  9. 6 Design Procedure and Error Calculation for External Input Resistance on CSA
    1. 6.1 Calculating eEXT for INA185A4 With 110Ω Input Resistors
  10. 7 Design Procedure for Input Resistance on Capacitively-Coupled Current Sense Amplifier
    1. 7.1 Bench Verification of Input eEXT for Capacitively-Coupled Current Sense Amplifiers
  11. 8 Design Procedure for Input Resistance at CSA Reference Pins
  12. 9 Input Resistance Error Test with INA185 Over Temperature
    1. 9.1 Schematic
    2. 9.2 Methods
    3. 9.3 Theoretical Model
    4. 9.4 Data for INA185A4 with 110Ω Input Resistors
      1. 9.4.1 Data Calculations
    5. 9.5 Analysis
  13. 10Input Resistance Error Test with INA191 Over Temperature
    1. 10.1 Schematic
    2. 10.2 Methods
    3. 10.3 Theoretical Model
    4. 10.4 Data for INA191A4 With 2.2kΩ Input Resistors
      1. 10.4.1 Data Analysis
    5. 10.5 Analysis
  14. 11Derivation of VOS, EXT for a Single Stage Current Sense Amplifier (CSA)
  15. 12Summary
  16. 13References

2 CSAs and Input Bias Stage

The input bias stage allows CSAs to operate with supply voltages (VS) independent of input common-mode voltage (VCM). For most devices, the input bias stage has a resistance (RBIAS) in between input pins ranging from 2kΩ to 72kΩ. This resistances creates an effective differential bias current (IB, Differential) that is proportional to the input differential shunt voltage.

Simplified Equivalent Models of Single Stage Current Sense Amplifier With Input Bias Stage Figure 2-1 Simplified Equivalent Models of Single Stage Current Sense Amplifier With Input Bias Stage

Within the input bias stage is circuitry that monitors the VCM to appropriately turn on a bias current (IB, CM ON). This usually occurs when VCM exceeds VS or some proportional value (check data sheet). For example with the single-stage CSA, INA185, a large jump in total input bias current occurs when VCM exceeds the 5V supply voltage.

Input Bias Current vs Input Common-Mode Voltage for INA185 Figure 2-2 Input Bias Current vs Input Common-Mode Voltage for INA185

Aside from this shift, the total IB, CM is the general leakage current (IB, Leakage) from bus voltage at input pins to the reference voltage at REF pin. Thus the total input bias current for each input pin is the summation of common-mode leakage from bus to reference, IB, CM ON, and the differential current through RBIAS.

Equation 1. IB, Leakage = VCM-VREF/BIASRINT + RFB+ REXTIB, Total = IB, Leakage + IB, Differential + IB, CM ON

Note for two-stage CSAs, the IB, Leakage is determined by difference between VCM and the internal bias voltage (VCM2) in between first and second stage; however, please defer to the input bias current data plots in data sheets as current pathway can be more complex.

Understanding input bias currents is important as input bias determine offset error from external input resistance (VOS, EXT).