SLYA042 July   2024 FDC1004 , FDC1004-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 CSAs and Input Bias Stage
  6. 3 CSA and Gain Error Factor
  7. 4 Applications for Resistance at Input Pins of Current Sense Amplifiers
    1. 4.1 Input Resistance Design Considerations
  8. 5 Applications for Input Resistance at Reference Pins of Current Sense Amplifiers
    1. 5.1 Bidirectional CSA and Applications
    2. 5.2 Driving CSA Reference Pin With High-Resistance Source Voltage
    3. 5.3 Input Resistance at Reference Pin Design Considerations
  9. 6 Design Procedure and Error Calculation for External Input Resistance on CSA
    1. 6.1 Calculating eEXT for INA185A4 With 110Ω Input Resistors
  10. 7 Design Procedure for Input Resistance on Capacitively-Coupled Current Sense Amplifier
    1. 7.1 Bench Verification of Input eEXT for Capacitively-Coupled Current Sense Amplifiers
  11. 8 Design Procedure for Input Resistance at CSA Reference Pins
  12. 9 Input Resistance Error Test with INA185 Over Temperature
    1. 9.1 Schematic
    2. 9.2 Methods
    3. 9.3 Theoretical Model
    4. 9.4 Data for INA185A4 with 110Ω Input Resistors
      1. 9.4.1 Data Calculations
    5. 9.5 Analysis
  13. 10Input Resistance Error Test with INA191 Over Temperature
    1. 10.1 Schematic
    2. 10.2 Methods
    3. 10.3 Theoretical Model
    4. 10.4 Data for INA191A4 With 2.2kΩ Input Resistors
      1. 10.4.1 Data Analysis
    5. 10.5 Analysis
  14. 11Derivation of VOS, EXT for a Single Stage Current Sense Amplifier (CSA)
  15. 12Summary
  16. 13References

5.1 Bidirectional CSA and Applications

As an overview, any CSA that has a reference (REF) pin is considered bidirectional. The majority of applications that require a bidirectional CSA are shown in Table 5-1.

Table 5-1 Applications that Require CSA Reference Pin
Application Type Application Benefit for VREF>0
Load current is bidirectional (positive and negative) Allows for measurement of entire positive and dynamic range.
Load current is unidirectional and pulse-width modulated (PWM) VOUT remains in linear region when load is at 0A, thus avoiding output delays and/or distortion.
System requires a fast one-point offset calibration procedure VOUT remains in linear region when load is at 0A, thus calibration procedure can occur when load is disabled (0A).

While the primary purpose of biasing a CSA output is to measure bidirectional current, another important application is the fast acquisition of unidirectional pulse-width modulated (PWM) currents that start at 0A. When any amplifier is starting from 0mV input or lower and VREF=0, then VOUT is starting the response in saturation, which can cause output distortion, overload recovery delays, and slow down amplifier response and settling times. Simply providing a small reference voltage (usually ≥ 100mV) to position the output into linear operating region can restore the device BW into specification at the expense of losing some output dynamic range.

The other important purpose for providing a reference voltage is to simplify a one-point offset calibration. One-point offset calibration procedures require one point of data and the easiest data point to use is when signal current = 0A (load disabled). Negating offset error can significantly reduce low current sensing error and thus increase accurate dynamic range.

A host's single-ended ADC can record and store into memory VOUT when load is off to calibrate out the tolerance of VREF as well as device offset.

A differential or pseudo-difference ADC can measure the output differentially (VOUT, differential), which is VOUT with respect to the reference pin (VREF). This allows system to negate error in VREF without needing to perform calibration because the resulting output measurement is the differential input multiplied by device gain. Error can be further minimized by performing a one-point calibration to calibrate the amplifier's offset.