SNAA386 November 2023 CDCE6214 , CDCE6214-Q1 , CDCE6214Q1TM , LMK00301 , LMK00304 , LMK00306 , LMK00308 , LMK00334 , LMK00334-Q1 , LMK00338 , LMK03318 , LMK03328 , LMK3H0102 , LMK6C , LMK6H , LMKDB1104 , LMKDB1108 , LMKDB1120 , LMKDB1202 , LMKDB1204
For measuring the performance of REFCLK, a Phase Noise Analyzer (PNA) can be used to measure the frequency-domain of the jitter, the phase noise. The output trace can be output to a text file, which can then be post-process through a PCIe processing tool. Newer PNAs, such as the R&S® FWSP used in this paper, are able to support both SSC and non-SSC phase noise data collection, allowing for post-processing of spread-spectrum clocks. Figure 5-1 shows the test setup for the PNA measurements. Table 5-1 lists the equipment and devices used in the REFCLK measurements.
Low-Noise Source | Devices Under Test (DUTs) | Balun | Measurement Equipment |
---|---|---|---|
R&S® SMA100B Agilent E5052B |
LMK3H0102 LMKDB1120(1) |
Mini-Circuits® ADTL2-18 | R&S® FSWP(2) Agilent DSO80804B(3) |