SNIU028D February 2016 – September 2020 UCD3138 , UCD3138064 , UCD3138064A , UCD3138128 , UCD3138A , UCD3138A64
Part Number | Addresses |
---|---|
3138 | FFFFFE90 |
3138064 | FFFFFE90 (PFLASHCTRL_1) |
3138A64 | FFFFFE9C (PFLASHCTRL_2) |
FFFFFE90 (PFLASHCTRL_0) | |
FFFFFE9C (PFLASHCTRL_1) | |
3138128 | FFFFFE90 (PFLASHCTRL_0) |
FFFFFE9C (PFLASHCTRL_1) | |
FFFFFEA0 (PFLASHCTRL_2) | |
FFFFFEA4 (PFLASHCTRL_3) |
11 | 10 | 9 | 8 | 7 | 5 | 4 | 0 |
BUSY | Reserved | PAGE_ ERASE | MASS_ ERASE | Reserved | PAGE_SEL |
R-0 | R-0 | R/W-0 | R/W-0 | R-000 | R-00000 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
11 | BUSY | R | 0 | Program Flash Busy Indicator 0 = Program Flash available for read/write/erase access 1 = Program Flash unavailable for read/write/erase access |
10 | Reserved | R | 0 | |
9 | PAGE_ERASE | R/W | 0 | Program Flash Page Erase Enable 0 = No Page Erase initiated on Program Flash (Default) 1 = Page Erase on Program Flash enabled. Page erased is based on PAGE_SEL (Bits 4-0). Interlock Key must be set in Program Flash Interlock Register (Section 16.2.8) to initiate Page Erase cycle. This bit is cleared upon completion of Page Erase cycle. |
8 | MASS_ERASE | R/W | 0 | Program Flash Mass Erase Enable 0 = No Mass Erase initiated on Program Flash (Default) 1 = Mass Erase of Program Flash enabled. Interlock Key must be set in Program Flash Interlock Register (Section 16.2.8) to initiate Mass Erase cycle. This bit is cleared upon completion of Mass Erase cycle. |
7-5 | Reserved | R | 000 | |
4-0 | PAGE_SEL | R | 00000 | Selects page to be erased during Page Erase Cycle |