SNIU028D February 2016 – September 2020 UCD3138 , UCD3138064 , UCD3138064A , UCD3138128 , UCD3138A , UCD3138A64
The Filter status register has 5 bits.
FILTER_BUSY
YN_LOW_CLAMP
YN_HIGH_CLAMP
KI_YN_LOW_CLAMP
KI_YN_HIGH_CLAMP
The FILTER_BUSY bit is high when the filter is calculating. This calculation time is very short, only a few instruction cycles. It is very difficult to reliably detect the high time of the Filter Busy bit.
The other bits are written to each time the filter calculation is complete. They reflect the result of the most recent filter calculation.