SNIU028D February 2016 – September 2020 UCD3138 , UCD3138064 , UCD3138064A , UCD3138128 , UCD3138A , UCD3138A64
Address 0x00040000
12 | 11 | 10 | 8 | 7 | 4 |
ADC_SEL_ REF | ADC_ ROUND | BYPASS_EN | MAX_CONV |
R/W-0 | R/W-0 | R/W-111 | R/W-0000 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
12 | ADC_SEL_REF | R/W | 0 | |
11 | ADC_ROUND | R/W | 0 | |
10-8 | BYPASS_EN | R/W | 111 | Bypasses the dual sample and hold circuitry, Bit 10 controls ADC Channel 2, Bit 9 controls ADC Channel 1 and Bit 8 controls ADC Channel 0 0 = Enables the Dual Sample and Hold circuitry 1 = Disables the Dual Sample and Hold circuitry (Default) |
7-4 | MAX_CONV | R/W | 0000 |