SNIU028D February 2016 – September 2020 UCD3138 , UCD3138064 , UCD3138064A , UCD3138128 , UCD3138A , UCD3138A64
Address 0x0008_0014 – Front End Control 2 DAC Step Register
Address 0x000B_0014 – Front End Control 1 DAC Step Register
Address 0x000E_0014 – Front End Control 0 DAC Step Register
17 | 0 |
DAC_STEP |
R/W-00 0000 0000 0000 0000 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
17-0 | DAC_STEP | R/W | 00 0000 0000 0000 0000 | Programmable 18-bit unsigned DAC Step. Bits 17:10 represent the real portion of the DAC Step (0-255 DAC counts at bit resolution of 0.09765625mV). Bits 9:0 represent the fractional portion of the DAC Step. |