SNIU028D February 2016 – September 2020 UCD3138 , UCD3138064 , UCD3138064A , UCD3138128 , UCD3138A , UCD3138A64
Address 0005003C – DPWM 3 Overflow Register
Address 0007003C – DPWM 2 Overflow Register
Address 000A003C – DPWM 1 Overflow Register
Address 000D003C – DPWM 0 Overflow Register
7 | 6 | 5 | 4 | 3 | 0 |
PWM_B _CHECK | PWM_A _CHECK | GPIO_B_IN | GPIO_A_IN | OVERFLOW |
R-0 | R-0 | R-0 | R-0 | R-0 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7 | PWM_B_CHECK | R | 0 | Value of PWM B internal check 0 = Passed checks 1 = Failed checks (override required to enable output) |
6 | PWM_A_CHECK | R | 0 | Value of PWM B input 0 = Passed check 1 = Failed check (override required to enable output) |
5 | GPIO_B_IN | R | 0 | Value of PWM B input 0 = Low signal on PWM B 1 = High signal on PWM B |
4 | GPIO_A_IN | R | 0 | Value of PWM A input 0 = Low signal on PWM A 1 = High value on PWM A |
3-0 | OVERFLOW | R | 0 | PWM Event 4 Overflow Status 0 = CLA Event 4 has not overflowed 1 = Overflow condition found on CLA Event 4 OVERFLOW[2] – CLA Event 4 Overflow Status 0 = PWM Event 4 has not overflowed 1 = Overflow condition found on PWM Event 4 OVERFLOW[1] – CLA Event 3 Overflow Status 0 = CLA Event 3 has not overflowed 1 = Overflow condition found on CLA Event 3 OVERFLOW[0] – CLA Event 2 Overflow Status 0 = CLA Event 2 has not overflowed 1 = Overflow condition found on CLA Event 2 |