SNLA261A August   2016  – March 2024 DP83822H , DP83822HF , DP83822I , DP83822IF , DP83825I , DP83826E , DP83826I , DP83867CR , DP83867CS , DP83867E , DP83867IR , DP83867IS , DP83869HM

 

  1.   1
  2.   DP838xx Wake-On-LAN
  3.   Trademarks
  4. 1Introduction
  5. 2Wake-on-LAN
    1. 2.1 WoL – Principles of Operation
      1. 2.1.1 Magic Packet Detection
      2. 2.1.2 Magic Packet Detection with Secure-ON
      3. 2.1.3 Custom Pattern Detection
      4. 2.1.4 WoL - Mechanisms
    2. 2.2 WoL - Implementation
      1. 2.2.1 Magic Packet Detection - Implementation
        1. 2.2.1.1 Example 1 – Pulse Mode Indication on LED_1 (DP83822)
        2. 2.2.1.2 Example 2 – Level Change Mode Indication on COL (DP83822)
        3. 2.2.1.3 Example 3 – Pulse Mode indication on GPIO_1 (DP83867)
      2. 2.2.2 Magic Packet Detection with Secure-ON - Implementation
        1. 2.2.2.1 Example 1 – Pulse Mode Indication on COL with Secure-ON (DP83822)
        2. 2.2.2.2 Example 2 – Level Change Mode Indication on RX_D3 with Secure-ON (DP83822)
        3. 2.2.2.3 Example 3 – Pulse Mode indication on GPIO_1 (DP83869)
      3. 2.2.3 Custom Pattern Detection - Implementation
        1. 2.2.3.1 Example 1 – Pulse Mode Indication on COL with Byte Mask (DP83822)
        2. 2.2.3.2 Example 2 – Pulse Mode Indication on GPIO_0 with Byte Mask (DP83867)
  6. 3Summary
  7. 4Revision History

2.1.3 Custom Pattern Detection

When configured for Custom Pattern Detection, DP838xx scans all incoming frames addressed to the node for a specific configurable data sequence. This sequence identifies the frame as a Custom Pattern frame.

A Custom Pattern frame does not need to adhere to the basic requirements for LAN technology.

The Custom Pattern frame can be up to a 64-byte sequence that is defined by the user in registers. An optional Byte Mask register within DP838xx provides more customization by allowing the user to selectively mask the incoming sequence to specify a smaller sequence in the range of 1-byte to 64-byte.