SNLA261A August   2016  – March 2024 DP83822H , DP83822HF , DP83822I , DP83822IF , DP83825I , DP83826E , DP83826I , DP83867CR , DP83867CS , DP83867E , DP83867IR , DP83867IS , DP83869HM

 

  1.   1
  2.   DP838xx Wake-On-LAN
  3.   Trademarks
  4. 1Introduction
  5. 2Wake-on-LAN
    1. 2.1 WoL – Principles of Operation
      1. 2.1.1 Magic Packet Detection
      2. 2.1.2 Magic Packet Detection with Secure-ON
      3. 2.1.3 Custom Pattern Detection
      4. 2.1.4 WoL - Mechanisms
    2. 2.2 WoL - Implementation
      1. 2.2.1 Magic Packet Detection - Implementation
        1. 2.2.1.1 Example 1 – Pulse Mode Indication on LED_1 (DP83822)
        2. 2.2.1.2 Example 2 – Level Change Mode Indication on COL (DP83822)
        3. 2.2.1.3 Example 3 – Pulse Mode indication on GPIO_1 (DP83867)
      2. 2.2.2 Magic Packet Detection with Secure-ON - Implementation
        1. 2.2.2.1 Example 1 – Pulse Mode Indication on COL with Secure-ON (DP83822)
        2. 2.2.2.2 Example 2 – Level Change Mode Indication on RX_D3 with Secure-ON (DP83822)
        3. 2.2.2.3 Example 3 – Pulse Mode indication on GPIO_1 (DP83869)
      3. 2.2.3 Custom Pattern Detection - Implementation
        1. 2.2.3.1 Example 1 – Pulse Mode Indication on COL with Byte Mask (DP83822)
        2. 2.2.3.2 Example 2 – Pulse Mode Indication on GPIO_0 with Byte Mask (DP83867)
  6. 3Summary
  7. 4Revision History

Example 2 – Pulse Mode Indication on GPIO_0 with Byte Mask (DP83867)

Byte Mask = 00-00-00-00-00-00-00-00

Pattern = 5F-47-0C-0E-FB-4B-1D-64-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-49-E6-54-FB

To enable Custom Pattern detection with pulse (8 clock cycles) indication on GPIO_0 use the following register writes:

Table 2-11 WoL Magic Packet Configuration Steps; Pulse Mode
StepRegisterValueDescription
1013C475FPattern Bytes 0 and 1
2013D0E0CPattern Bytes 2 and 3
3013E4BFBPattern Bytes 4 and 5
4013F641DPattern Bytes 6 and 7
501400000Pattern Bytes 8 and 7
601410000Pattern Bytes 10 and 11
701420000Pattern Bytes 12 and 13
801430000Pattern Bytes 14 and 15
901440000Pattern Bytes 16 and 17
1001450000Pattern Bytes 18 and 19
1101460000Pattern Bytes 20 and 21
1201470000Pattern Bytes 22 and 23
1301480000Pattern Bytes 24 and 25
1401490000Pattern Bytes 26 and 27
15014A0000Pattern Bytes 28 and 29
16014B0000Pattern Bytes 30 and 31
17014C0000Pattern Bytes 32 and 33
18014D0000Pattern Bytes 34 and 35
19014E0000Pattern Bytes 36 and 37
20014F0000Pattern Bytes 38 and 39
2101500000Pattern Bytes 40 and 41
2201510000Pattern Bytes 42 and 43
2301520000Pattern Bytes 44 and 45
2401530000Pattern Bytes 46 and 47
2501540000Pattern Bytes 48 and 49
2601550000Pattern Bytes 50 and 51
2701560000Pattern Bytes 52 and 53
2801570000Pattern Bytes 54 and 55
2901580000Pattern Bytes 56 and 57
3001590000Pattern Bytes 58 and 59
31015AE649Pattern Bytes 60 and 61
32015BFB54Pattern Bytes 62 and 63
33015C0000Byte Mask 0 to 15
34015D0000Byte Mask 16 to 31
35015E0000Byte Mask 32 to 47
36015F0000Byte Mask 48 to 63
3701720033Configures GPIO_0 pin for WoL Indication
3801340082WoL Enabled, Pulse Indication, 8 clock cycles