SNLA404 December   2022 DP83TC811R-Q1 , DP83TC811S-Q1 , DP83TC812R-Q1 , DP83TC812S-Q1 , DP83TG720R-Q1 , DP83TG720S-Q1

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2PHY Link-up Sequence
    1. 2.1 Microcontroller Initialization
    2. 2.2 Power-up Sequence
      1. 2.2.1 All Supplies Ramped
      2. 2.2.2 PHY Clock Required Good
      3. 2.2.3 SMI Access Available
      4. 2.2.4 PHY Bootstraps Sampled
    3. 2.3 Check Device ID
    4. 2.4 PHY Initialization
      1. 2.4.1 Managed or Autonomous Mode?
      2. 2.4.2 Program PHY Configuration Settings, Enable Link Start-up
      3. 2.4.3 Program PHY Into Autonomous Mode
      4. 2.4.4 Soft Restart or Polling for Link
      5. 2.4.5 Results of Link Polling
    5. 2.5 Post Start-up Operation
    6. 2.6 Reset Sequence
      1. 2.6.1 Reset Initiated
      2. 2.6.2 SMI Access Available
      3. 2.6.3 Transition to Normal Operation
  5. 3Summary
  6.   A Appendix

2.2.4 PHY Bootstraps Sampled

At TC (relative to T0), the PHY samples the bootstraps to determine initial modes in which to power up. Since a number of the PHY pins are bootstrap pins, it is important that MCUs do not alter the voltages at these pins at this time or else the PHY does not sample properly. The desired voltages are set in hardware through a series of voltage divider circuits or internal pullup or pulldown resistors.

811

720

812
TC (ms)

60

60

10

An example is a MII pin which also functions as a strap pin. If the Media Access Control (MAC) were to begin sending packets during strapping, the pin can be driven by the MCU instead of by the strap network and therefore the PHY can sample an unintended voltage depending on where in the waveform the PHY begins to sample. This is more consequential in multilevel straps where the voltage ranges per mode are smaller. After sampling, the pins transition to their normal operation shortly after. MAC and MCU proper functions for these pins can occur after this transition.