SPRABY5 January   2024 TMS320F2800132 , TMS320F2800133 , TMS320F2800135 , TMS320F2800137 , TMS320F2800152-Q1 , TMS320F2800153-Q1 , TMS320F2800154-Q1 , TMS320F2800155 , TMS320F2800155-Q1 , TMS320F2800156-Q1 , TMS320F2800157 , TMS320F2800157-Q1 , TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280033 , TMS320F280034 , TMS320F280034-Q1 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037-Q1 , TMS320F280037C , TMS320F280037C-Q1 , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1 , TMS320F28075 , TMS320F28075-Q1 , TMS320F28076 , TMS320F28374D , TMS320F28374S , TMS320F28375D , TMS320F28375S , TMS320F28375S-Q1 , TMS320F28376D , TMS320F28376S , TMS320F28377D , TMS320F28377D-EP , TMS320F28377D-Q1 , TMS320F28377S , TMS320F28377S-Q1 , TMS320F28378D , TMS320F28378S , TMS320F28379D , TMS320F28379D-Q1 , TMS320F28379S

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 Symptoms of an Unreliable Reference
    2. 1.2 ADC Principle of Operation
    3. 1.3 Layout Guidelines
    4. 1.4 Key Reference Buffer Specifications
    5. 1.5 VREFHI Example for C2000 MCUs
  5. 2Unbuffered Reference
  6. 3Buffered Reference
  7. 4VDDA as Reference Voltage for ADC
  8. 5Summary
  9. 6References
  10. 7ADC Related Collateral

1.2 ADC Principle of Operation

Based on a given analog input voltage, the expected conversion result for a 12-bit single-ended C2000 ADC is given by the formula below.

Equation 1. ADCRESULTx   =   4095( ADCINy - VREFLO VREFHI - VREFLO ) 

For a single-ended 16-bit ADC, the expected conversion result is instead given by the formula below.

Equation 2. ADCRESULTx   =   65535( ADCINy - VREFLO VREFHI - VREFLO ) 

The expected conversion result for a 12-bit differential-ended ADC is given by the formula below. Notice that a differential conversion requires two inputs.

Equation 3. ADCRESULTx   =   4095( ADCINyP - ADCINyN + VREFHI 2 VREFHI ) 

For a differential-ended 16-bit ADC, the expected conversion result is instead given by the formula below.

Equation 4. ADCRESULTx   =   65535( ADCINyP - ADCINyN + VREFHI 2 VREFHI ) 

Most C2000 ADCs can operate in two different reference modes: internal and external reference modes. When the internal bandgap is chosen to generate the reference voltage for the ADC, the C2000 device itself drives a voltage out onto the VREFHI pin. In external reference mode, the VREFHI and VREFLO are driven by an external circuit. The VREFHI and VREFLO pins then set the ADC conversion range.